Browsing by Author "Thomas, S.G."
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Publication Analysis of the pre-epi bake conditions on the defect creation in recessed Si1-xGex S/D junctions
Proceedings paper2007, Analytical and Diagnostic Techniques for Semiconductor Materials, Devices, and Processes 7, 7/10/2007, p.47-53Publication Electrical demonstration of thermally stable Ni silicides on Si1-xCx epitaxial layers
Journal article2010, Microelectronic Engineering, (87) 3, p.306-310Publication Electrical performance comparison of embedded Si1-xGex source/drain junctions processed in 200 mm and 300 mmEpi-reactors
Proceedings paper2008, Semiconductor Advances for Future Electronics Workshop - SAFE, 27/11/2008, p.539-543Publication Impact of the Ge content and the epitaxial thickness on the bandgap shrinkage induced leakage current of recessed Si1-xGex source/drain junctions
Proceedings paper2007, Workshop on Semiconductor Advances for Future Electronics and Sensors - SAFE, 29/11/2007, p.496-200Publication Impact of the pre-epi bake conditions in embedded Si1-xGex source/drain junctions
Meeting abstract2009, E-MRS Spring Meeting Symposium I: Silicon and germanium Issues for Future CMOS Devices, 8/06/2009Publication Influence of the highly-doped drain implantation and the window size on defect creation in p/n Si1-xGex source/drain junctions
Publication On the 1/f noise in pMOSFETs with embedded SiGe source/drain
Meeting abstract2007, 8th European Workshop on ULtimate Integration of Silicon - ULIS, 15/03/2007, p.75-78Publication On the low-frequency noise performance of embedded Si:C nMOSFETs
Proceedings paper2009, ULSI Process Integration 6, 4/10/2009, p.193-200Publication On the low-frequency noise performance of embedded Si:C nMOSFETs
Meeting abstract2009, 216th ECS Meeting, 4/10/2009, p.2363Publication Relaxation induced excess leakage current in recessed Si1-xGex source/drain junctions
Proceedings paper2007, Advanced Gate Stack, Source/Drain and Channel Engineering for Si-based CMOS 3: New Materials, Processes and Equipment, 6/05/2007, p.389-396Publication SiCP selective epitaxial growth in recessed source/drain regions yielding to drive current enhancement in n-channel MOSFET
; Meeting abstract2008, 214th ECS Meeting, 12/10/2008, p.2486Publication SiGe recessed source-drain (RSD) stressors for PMOS: effect of device integration flow and increased Ge content on electrical performance
Proceedings paper2007, International Conference on Solid State Devices and Materials - SSDM, 18/09/2007Publication Stress analysis of Si1-xGex embedded source/drain junctions
Journal article2008, Materials Sicience in Semiconductor Processing, (11) 5, p.285-290