Browsing by author "Singanamalla, Raghunath"
Now showing items 1-20 of 26
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A low-power multi-gate FET CMOS technology with 13.9ps inverter delay, large-scale integrated high performance digital circuits and SRAM
von Arnim, Klaus; Augendre, Emmanuel; Pacha, C.; Schulz, Thomas; San, Kemal Tamer; Bauer, F.; Nackaerts, Axel; Rooyackers, Rita; Vandeweyer, Tom; Degroote, Bart; Collaert, Nadine; Dixit, Abhisek; Singanamalla, Raghunath; Xiong, W.; Marshall, A.; Cleavelin, C.R.; Schrüfer, K.; Jurczak, Gosia (2007) -
Achieving low VT Ni-FUSI CMOS via lanthanide incorporation in the gate stack
Veloso, Anabela; Yu, HongYu; Lauwers, Anne; Chang, Shou-Zen; Adelmann, Christoph; Onsia, Bart; Demand, Marc; Brus, Stephan; Vrancken, Christa; Singanamalla, Raghunath; Lehnen, Peer; Kittl, Jorge; Kauerauf, Thomas; Vos, Rita; O'Sullivan, Barry; Van Elshocht, Sven; Mitsuhashi, Riichirou; Whittemore, G.; Yin, K.M.; Niwa, Masaaki; Hoffmann, Thomas; Absil, Philippe; Jurczak, Gosia; Biesemans, Serge (2007-09) -
Achieving low-VT Ni-FUSI CMOS via Lanthanide incorporation in the gate stack
Veloso, Anabela; Yu, HongYu; Lauwers, Anne; Chang, Shou-Zen; Adelmann, Christoph; Onsia, Bart; Demand, Marc; Brus, Stephan; Vrancken, Christa; Singanamalla, Raghunath; Lehnen, Peer; Kittl, Jorge; Kauerauf, Thomas; Vos, Rita; O'Sullivan, Barry; Van Elshocht, Sven; Mitsuhashi, Riichirou; Whittemore, G.; Yin, K.M.; Niwa, Masaaki; Hoffmann, Thomas; Absil, Philippe; Jurczak, Gosia; Biesemans, Serge (2008) -
Demonstration of metal-gated low Vt n-MOSFETs using a Poly-Si/TaN/Dy2O3/SiON gate stack with a scaled EOT value
Yu, HongYu; Singanamalla, Raghunath; Ragnarsson, Lars-Ake; Chang, Vincent; Cho, Hag-Ju; Mitsuhashi, Riichirou; Adelmann, Christoph; Van Elshocht, Sven; Lehnen, Peer; Chang, Shou-Zen; Yin, K.M.; Schram, Tom; Kubicek, Stefan; De Gendt, Stefan; Absil, Philippe; De Meyer, Kristin; Biesemans, Serge (2007) -
Demonstration of Ni fully GermanoSilicide as a pFET gate electrode candidate on HfSiON
Yu, HongYu; Singanamalla, Raghunath; Opsomer, Karl; Augendre, Emmanuel; Simoen, Eddy; Kittl, Jorge; Kubicek, Stefan; Severi, Simone; Shi, Xiaoping; Brus, Stephan; Zhao, Chao; de Marneffe, Jean-Francois; Locorotondo, Sabrina; Shamiryan, Denis; Van Dal, Mark; Veloso, Anabela; Lauwers, Anne; Niwa, Masaaki; Maex, Karen; De Meyer, Kristin; Absil, Philippe; Jurczak, Gosia; Biesemans, Serge (2005) -
Demonstration of phase-controlled Ni-FUSI CMOSFETs employing SiON dielectrics capped with sub-monolayer ALD HfSiON for low power applications
Yu, HongYu; Chang, Shou-Zen; Veloso, Anabela; Lauwers, Anne; Delabie, Annelies; Everaert, Jean-Luc; Singanamalla, Raghunath; Kerner, Christoph; Vrancken, Christa; Brus, Stephan; Absil, Philippe; Hoffmann, Thomas; Biesemans, Serge (2007-09) -
Effect of degas before metal gate deposition on the threshold voltage
Petry, Jasmine; Xiong, K.; Ragnarsson, Lars-Ake; Singanamalla, Raghunath; Hooker, Jacob (2007) -
Effective metal gate work function modification by ion implantation with W-based gate stack
Li, Zilan; Schram, Tom; Kerner, Christoph; Witters, Thomas; Singanamalla, Raghunath; Pourtois, Geoffrey; Paraschiv, Vasile; Hoffmann, Thomas Y.; Rohr, Erika; Absil, Philippe; De Gendt, Stefan; De Meyer, Kristin (2008) -
Effective work-function modulation by aluminum-ion implantation for metal-gate technology (poly-Si/TiN/SiO2)
Singanamalla, Raghunath; Yu, HongYu; Van Daele, Benny; Kubicek, Stefan; De Meyer, Kristin (2007) -
Electrical properties of n-MOSFETs using the NiSi:Yb FUSI electrode
Yu, HongYu; Lauwers, Anne; Demeurisse, Caroline; Richard, Olivier; Mertens, Sofie; Opsomer, Karl; Singanamalla, Raghunath; Rosseel, Erik; Absil, Philippe; Biesemans, Serge (2007-02) -
Gate-dielectric interface effects in low frequency (1/f) noise in p-MOSFETs with high-K dielectrics
Srinivasan, Purushothaman; Simoen, Eddy; Singanamalla, Raghunath; Yu, HongYu; Claeys, Cor; Misra, D. (2005) -
Investigation of high-k-metal gate integration for sub 45 nm planar bulk CMOS technologies
Singanamalla, Raghunath (2008-12) -
Low VT CMOS using doped Hf-based oxides, TaC-based metals and laser-only anneal
Kubicek, Stefan; Schram, Tom; Paraschiv, Vasile; Vos, Rita; Demand, Marc; Adelmann, Christoph; Witters, Thomas; Nyns, Laura; Ragnarsson, Lars-Ake; Yu, HongYu; Veloso, Anabela; Singanamalla, Raghunath; Kauerauf, Thomas; Rohr, Erika; Brus, Stephan; Vrancken, Christa; Chang, Vincent; Mitsuhashi, Riichirou; Akheyar, Amal; Cho, Hag-Ju; Hooker, Jacob; O'Sullivan, Barry; Chiarella, Thomas; Kerner, Christoph; Delabie, Annelies; Van Elshocht, Sven; De Meyer, Kristin; De Gendt, Stefan; Absil, Philippe; Hoffmann, Thomas Y.; Biesemans, Serge (2007) -
Low Vt Ni-FUSI CMOS technology using a DyO cap layer with either single or dual Ni-phases
Yu, HongYu; Chang, Shou-Zen; Veloso, Anabela; Lauwers, Anne; Adelmann, Christoph; Onsia, Bart; Van Elshocht, Sven; Singanamalla, Raghunath; Demand, Marc; Vos, Rita; Kauerauf, Thomas; Brus, Stephan; Shi, Xiaoping; Kubicek, Stefan; Vrancken, Christa; Mitsuhashi, Riichirou; Lehnen, Peer; Kittl, Jorge; Niwa, M.; Yin, K.M.; Hoffmann, Thomas; De Gendt, Stefan; Jurczak, Gosia; Absil, Philippe; Biesemans, Serge (2007) -
Metal inserted poly-Si (MIPS) and FUSI dual metal (TaN and NiSi) CMOS integration
Singanamalla, Raghunath; Van Dal, Mark; Demand, Marc; Shamiryan, Denis; Beckx, Stephan; Jaenen, Patrick; Locorotondo, Sabrina; Yu, HongYu; Hooker, Jacob; Kubicek, Stefan; De Meyer, Kristin; Biesemans, Serge; Juffermans, Casper; Lander, Rob (2007-04) -
Methodology for flatband voltage measurement in fully depleted floating-body FinFETs
Ferain, Isabelle; Pantisano, Luigi; O'Sullivan, Barry; Singanamalla, Raghunath; Collaert, Nadine; Jurczak, Gosia; De Meyer, Kristin (2008) -
N-type VT tuning by Te ion implantation in moly-based metal gates with high-k dielectric for fully depleted devices
Petry, Jasmine; Boccardi, Guillaume; Xiong, K.; Mueller, Markus; Hooker, Jacob; Singanamalla, Raghunath; Collaert, Nadine; De Meyer, Kristin (2008) -
Nitrogen profile and dielectric cap layer (Al2O3, Dy2O3, La2O3) engineering on Hf-silicate
Cho, Hag-Ju; Yu, HongYu; Ragnarsson, Lars-Ake; Chang, Vincent; Schram, Tom; O'Sullivan, Barry; Kubicek, Stefan; Mitsuhashi, Riichirou; Akheyar, Amal; Van Elshocht, Sven; Witters, Thomas; Delabie, Annelies; Adelmann, Christoph; Rohr, Erika; Singanamalla, Raghunath; Chang, Shou-Zen; Swerts, Johan; Lehnen, Peer; De Gendt, Stefan; Absil, Philippe; Biesemans, Serge (2007) -
Performance enhancement of Poly-Si/TiN/SiON based pMOSFETs by addition of an AlO capping layer
Singanamalla, Raghunath; Yu, HongYu; O'Sullivan, Barry; Petry, Jasmine; Mercha, Abdelkarim; Paraschiv, Vasile; Volders, Henny; Kubicek, Stefan; De Meyer, Kristin; Biesemans, Serge (2007) -
Single-wafer wet chemical oxide formation for pre-ALD high-k deposition on 300 mm wafer
Sano, K.; Izumi, A.; Eitoku, A.; Snow, J.; Nyns, Laura; Kubicek, Stefan; Singanamalla, Raghunath; Richard, Olivier; Conard, Thierry; Vos, Rita; Mertens, Paul (2008)