Browsing by author "Breuil, Laurent"
Now showing items 1-20 of 89
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A consistent model for the SANOS programming operation
Furnemont, Arnaud; Rosmeulen, Maarten; Cacciato, Antonio; Breuil, Laurent; De Meyer, Kristin; Maes, Herman; Van Houdt, Jan (2007) -
A new 2 isolated-bits/cell Flash memory device with self aligned split gate structure using ONO stacks for charge storage
Breuil, Laurent; Schuler, Franz; Haspeslagh, Luc; Wellekens, Dirk; De Vos, Joeri; Lorenzini, Martino; Van Houdt, Jan (2003) -
A new scalable self-aligned dual-bit split-gate charge trapping memory device
Breuil, Laurent; Haspeslagh, Luc; Blomme, Pieter; Wellekens, Dirk; De Vos, Joeri; Lorenzini, Martino; Van Houdt, Jan (2005) -
A novel multilayer inter-gate dielectric enabling up To 18V program / erase window for planar NAND flash
Breuil, Laurent; Lisoni, Judit; Blomme, Pieter; Van den Bosch, Geert; Van Houdt, Jan (2013-05) -
A Novel Ni-Al Alloy Metal Induced Lateral Crystallization Process for Improved Channel Conduction in 3-D NAND Flash
Ramesh, Siva; Banerjee, Kaustuv; Opsomer, Karl; Rachita, Iuliana; Bastos, Joao; Soulie, Jean-Philippe; Sebaai, Farid; Favia, Paola; Korytov, Maxim; Richard, Olivier; Breuil, Laurent; Arreghini, Antonio; Van den Bosch, Geert; Rosmeulen, Maarten (2022) -
A novel PEALD tunnel dielectric for three-dimensional non-volatile charge-trapping technology
Cacciato, Antonio; Breuil, Laurent; Dekkers, Harold; Zahid, Mohammed; Kar, Gouri Sankar; Everaert, Jean-Luc; Schoofs, Geert; Shi, Qixian; Van den Bosch, Geert; Jurczak, Gosia; Debusschere, Ingrid; Van Houdt, Jan; Cockburn, Andrew; Date, Lucien; Xa, Li Qun; Le, Maggie; Lee, Won (2011) -
A novel PEALD tunnel dielectric for three-dimensional non-volatile charge-trapping technology
Cacciato, Antonio; Breuil, Laurent; Dekkers, Harold; Zahid, Mohammed; Kar, Gouri Sankar; Everaert, Jean-Luc; Schoofs, Geert; Van den Bosch, Geert; Jurczak, Gosia; Debusschere, Ingrid; Van Houdt, Jan; Cockburn, Andrew; Date, Lucien; Xa, Li-Qun; Le, Maggie; Lee, Won (2010) -
Advantages of the FinFET architecture in SONOS and nanocrystal memory devices
Lombardo, S.; Gerardi, C.; Breuil, Laurent; Jahan, C.; Perniola, L.; Cina, G.; Corso, D.; Tripiciano, E.; Ancarani, V.; Iannoccone, G.; Bongiorno, C.; Garozzo, C.; Barbera, P.; Nowak, E.; Puglisi, R.; Costa, G.A.; Coccorese, C.; Vecchio, M.; Rimini, E.; Van Houdt, Jan; De Salvo, B.; Melanotte, M. (2007) -
Assessment of tunnel oxide and poly-Si channel traps in 3D SONOS memory before and after P/E cycling
Lee, Ko-Hui; Degraeve, Robin; Toledano Luque, Maria; Arreghini, Antonio; Breuil, Laurent; Blomme, Pieter; Van den Bosch, Geert; Van Houdt, Jan (2015) -
Band edge work function metal gates using PEALD TaCN electrodes
Maes, Jan; Swerts, Johan; Pierreux, Dieter; Machkaoutsan, Vladimir; Marcus, Steven; Milligan, Brennan; Schram, Tom; Ragnarsson, Lars-Ake; Cacciato, Antonio; Rohr, Erika; Rothschild, Aude; Hendrickx, Paul; Breuil, Laurent; Van den Bosch, Geert (2009) -
Channel and gate stack charge trapping investigation in vertical 3D NAND devices with poly-silicon channel
Subirats, Alexandre; Arreghini, Antonio; Breuil, Laurent; Degraeve, Robin; Van den Bosch, Geert; Linten, Dimitri; Furnemont, Arnaud (2017) -
Characterization of the spatial charge distribution in local charge-trapping memory devices using the charge pumping technique
Rosmeulen, Maarten; Breuil, Laurent; Lorenzini, Martino; Haspeslagh, Luc; Van Houdt, Jan; De Meyer, Kristin (2003) -
Characterization of the spatial charge distribution in local charge-trapping memory devices using the charge-pumping technique
Rosmeulen, Maarten; Breuil, Laurent; Lorenzini, Martino; Haspeslagh, Luc; Van Houdt, Jan; De Meyer, Kristin (2004-09) -
Comparative reliability investigation of different nitride based local charge trapping memory devices
Breuil, Laurent; Haspeslagh, Luc; Blomme, Pieter; Lorenzini, Martino; Wellekens, Dirk; De Vos, Joeri; Van Houdt, Jan (2005) -
Corner enhancement of FNT program/erase operations in nitride storage FinFlash devices
Breuil, Laurent; Rosmeulen, Maarten; Loo, Josine; Furnemont, Arnaud; Haspeslagh, Luc; Van Houdt, Jan (2007) -
Defect profiling in FEFET Si:HfO2 layers
O'Sullivan, Barry; Putcha, Vamsi; Izmailov, Roman; Afanas'ev, Valeri V.; Simoen, Eddy; Jung, Taehwan; Higashi, Yusuke; Degraeve, Robin; Truijen, Brecht; Kaczer, Ben; Ronchi, Nicolo; McMitchell, Sean; Banerjee, Kaustuv; Clima, Sergiu; Breuil, Laurent; Van den Bosch, Geert; Linten, Dimitri; Van Houdt, Jan (2020) -
Defects characterization of hybrid floating gate/ inter-gate dielectric interface in flash memory
Zahid, Mohammed; Degraeve, Robin; Tang, Baojun; Lisoni, Judit; Van den Bosch, Geert; Van Houdt, Jan; Breuil, Laurent; Blomme, Pieter; Arreghini, Antonio (2014) -
Effect of Al203 morphology on the erase saturation performance in SANOS-type memory cells
Cacciato, Antonio; Furnemont, Arnaud; Breuil, Laurent; De Vos, Joeri; Haspeslagh, Luc; Van Houdt, Jan (2007) -
Effect of high temperature annealing on tunnel oxide properties in TANOS devices
Arreghini, Antonio; Zahid, Mohammed; Van den Bosch, Geert; Suhane, Amit; Breuil, Laurent; Cacciato, Antonio; Van Houdt, Jan (2011) -
Effect of top dielectric morphology and gate material on the performance of nitride-based FLASH memory cells
Cacciato, Antonio; Breuil, Laurent; Van den Bosch, Geert; Richard, Olivier; Rothschild, Aude; Furnemont, Arnaud; Bender, Hugo; Kittl, Jorge; Van Houdt, Jan (2008)