Browsing by author "Civale, Yann"
Now showing items 21-40 of 43
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Fine pitch Cu/Sn solid state diffusion bonding for making high yield bump interconnections and its application in 3D integration
Zhang, Wenqi; Limaye, Paresh; Civale, Yann; Labie, Riet; Soussan, Philippe (2010) -
Highly-conformal plasma-enhanced atomic-layer deposition silicon dioxide liner for high aspect-ratio through-silicon via 3D interconnections
Civale, Yann; Redolfi, Augusto; Velenis, Dimitrios; Heylen, Nancy; Beynet, Julien; Jung, Insoo; Woo, Jeong-Jun; Swinnen, Bart; Beyer, Gerald; Beyne, Eric (2012) -
Impact of barrier integrity on liner reliability in 3D through silicon vias
Li, Yunlong; Civale, Yann; Oba, Yoshiyuki; Cockburn, Andrew; Park, Jin Hee; Beyne, Eric; De Wolf, Ingrid; Croes, Kristof (2013) -
Impact of through silicon via induced mechanical stress on fully depleted bulk FinFET technology
Guo, Wei; Van der Plas, Geert; Ivankovic, Andrej; Cherman, Vladimir; Eneman, Geert; De Wachter, Bart; Togo, Mitsuhiro; Redolfi, Augusto; Kubicek, Stefan; Civale, Yann; Chiarella, Thomas; Vandevelde, Bart; Croes, Kristof; De Wolf, Ingrid; Debusschere, Ingrid; Mercha, Abdelkarim; Thean, Aaron; Beyer, Gerald; Swinnen, Bart; Beyne, Eric (2012) -
Metallization for 3D interconnect processing
Philipsen, Harold; Civale, Yann; Vandersmissen, Kevin; Honore, Mia; Inoue, Fumihiro; Leunissen, Peter (2012) -
Novel seed layer formation using direct electroless copper deposition on ALD-Ru layer for high aspect ratio TSV
Inoue, Fumihiro; Philipsen, Harold; Radisic, Alex; Armini, Silvia; Civale, Yann; Leunissen, Peter; Shingubara, Shoso (2012) -
On the thermal stability of physically-vapor-deposited diffusion barriers in 3D through-silicon vias during IC processing
Civale, Yann; Croes, Kristof; Miyamori, Yuichi; Velenis, Dimitrios; Redolfi, Augusto; Thangaraju, Sarasvathi; Van Ammel, Annemie; Cherman, Vladimir; Van der Plas, Geert; Cockburn, Andrew; Gravey, Virginie; Kumar, Nirajan; Cao, Zhitao; Travaly, Youssef; Tokei, Zsolt; Beyne, Eric; Swinnen, Bart (2013) -
Polymer filling of silicon trenches for 3D through silicon vias applications
Duval, Fabrice; Okoro, Chukwudi; Civale, Yann; Soussan, Philippe; Beyne, Eric (2011) -
Relationships between deposition parameters, step coverage, throughput, and electrical properties of PEALD SiO2 insulation liners for HVM TSV application
Jung, In Soo; Woo, Jeong-Jun; Kwon, Hak Yong; Kim, Young-Jae; Kang, Dong-Suk; Park, Ju-Hyuk; Ahn, Dae-Young; Choi, Seung-Woo; Park, Hyung-Sang; Yoo, Yong Min; Civale, Yann; Redolfi, Augusto; Thangaraju, Sarasvathi; Travaly, Youssef; Swinnen, Bart; Beyne, Eric; De Roest, David; Beynet, Julien (2011) -
Reliability challenges during different phases of 3D SIC processing
Croes, Kristof; Civale, Yann; Labie, Riet; Li, Yunlong; De Messemaeker, Joke; Vanstreels, Kris; Redolfi, Augusto; Velenis, Dimitrios; Varela Pedreira, Olalla; Van De Peer, Myriam; Cherman, Vladimir; Vandevelde, Bart; Beyne, Eric; De Wolf, Ingrid (2012) -
Reliability concerns in copper TSV's: methods and results
Croes, Kristof; Cherman, Vladimir; Li, Yunlong; Zhao, Larry; Barbarin, Yohan; De Messemaeker, Joke; Civale, Yann; Velenis, Dimitrios; Stucchi, Michele; Kauerauf, Thomas; Redolfi, Augusto; Dimcic, Biljana; Ivankovic, Andrej; Van der Plas, Geert; De Wolf, Ingrid; Beyer, Gerald; Swinnen, Bart; Tokei, Zsolt; Beyne, Eric (2012-07) -
Seed-less copper electrochemical deposition on PVD resistive substrates as a replacement/enhancement for PVD Cu seed layers in HAR TSVs
Armini, Silvia; Wilson, Chris; Moussa, Alain; Franquet, Alexis; Vanstreels, Kris; Atanasova, Tanya; Radisic, Alex; Civale, Yann; Redolfi, Augusto; Van Ammel, Annemie; El-Mekki, Zaid; Bryce, George; Ruythooren, Wouter (2010) -
Spin-on dielectric liner TSV for 3D wafer level packaging applications
Civale, Yann; Majeed, Bivragh; Sabuncuoglu Tezcan, Deniz; Soussan, Philippe; Beyne, Eric (2010) -
Thermal stability of copper through-silicon via barriers during IC processing
Civale, Yann; Croes, Kristof; Miyamori, Yuichi; Thangaraju, Sarasvathi; Redolfi, Augusto; Van Ammel, Annemie; Velenis, Dimitrios; Cherman, Vladimir; Hendrickx, Paul; Van der Plas, Geert; Cockburn, Andrew; Gravey, Virginie; Kumar, Nirajan; Zhitao, Cao; Sabuncuoglu Tezcan, Deniz; Soussan, Philippe; Travaly, Youssef; Tokei, Zsolt; Beyne, Eric; Swinnen, Bart (2011) -
Through-silicon via technology for 3D applications
Philipsen, Harold; Luhn, Ole; Civale, Yann; Sabuncuoglu Tezcan, Deniz; Ruythooren, Wouter (2009) -
Through-Silicon Via technology for 3D applications
Philipsen, Harold; Luhn, Ole; Civale, Yann; Wang, Yu-Shuen; Sabuncuoglu Tezcan, Deniz; Ruythooren, Wouter (2010) -
Through-silicon via technology for three-dimensional integrated circuit manufacturing
Civale, Yann; Redolfi, Augusto; Jaenen, Patrick; Kostermans, Maarten; Van Besien, Els; Mertens, Sofie; Witters, Thomas; Jourdan, Nicolas; Armini, Silvia; Vandersmissen, Kevin; Philipsen, Harold; Verdonck, Patrick; Heylen, Nancy; Nolmans, Philip; Li, Yunlong; Croes, Kristof; Beyer, Gerald; Swinnen, Bart; Beyne, Eric (2012) -
Use of polymer liners for 3D-WLP TSVs: process, reliability and cost
Sabuncuoglu Tezcan, Deniz; Pham, Nga; Majeed, Bivragh; Civale, Yann; Beyne, Eric (2010) -
Use of polymer liners for 3D-WLP TSVs: process, reliability and cost
Sabuncuoglu Tezcan, Deniz; Pham, Nga; Majeed, Bivragh; Civale, Yann; Beyne, Eric (2010) -
Via last using polymer liners and their reliability
Sabuncuoglu Tezcan, Deniz; Majeed, Bivragh; Civale, Yann; Soussan, Philippe; Beyne, Eric (2010)