Browsing by author "Biesemans, Serge"
Now showing items 41-60 of 237
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Challenges in FEOL for 45nm and beyond
Biesemans, Serge (2004) -
Characteristics and integration challenges of FinFET-based devices for (Sub-)22nm technology nodes circuit applications
Veloso, Anabela; Van Dal, Mark; Collaert, Nadine; De Keersgieter, An; Witters, Liesbeth; Rooyackers, Rita; Redolfi, Augusto; Brus, Stephan; Duffy, Ray; Pawlak, Bartek; Vellianitis, Georgios; Duriez, Blandine; Merelle, Thomas; Absil, Philippe; Biesemans, Serge; Jurczak, Gosia; Hoffmann, Thomas Y.; Lander, Rob (2009-10) -
Characteristics of deep submicron n-MOSFETs in the temperature range 4.2 - 300 K
Alawneh, Isam; Simoen, Eddy; Biesemans, Serge; De Meyer, Kristin; Claeys, Cor (1998) -
CMOS integration of dual work function phase controlled Ni FUSI with simultaneous integration of nMOS (NiSi) and pMOS (Ni-rich silicide) gates on HfSiON
Lauwers, Anne; Veloso, Anabela; Hoffmann, Thomas Y.; Van Dal, Mark; Vrancken, Christa; Brus, Stephan; Locorotondo, Sabrina; de Marneffe, Jean-Francois; Sijmus, Bram; Kubicek, Stefan; Chiarella, Thomas; Kmieciak, Malgorzata; Opsomer, Karl; Niwa, Masaaki; Mitsuhashi, Riichirou; Kottantharayil, Anil; Yu, HongYu; Demeurisse, Caroline; Verbeeck, Rita; de Potter de ten Broeck, Muriel; Absil, Philippe; Maex, Karen; Jurczak, Gosia; Biesemans, Serge; Kittl, Jorge (2005-12) -
CMOS scaling into the nanometer regime: theory, design and technology
Biesemans, Serge (1998-05) -
CMP-less integration of fully Ni-silicided metal gates in FinFETs by simultaneous silicidation of the source, drain, and the gate using a novel dual hard mask approach
Kottantharayil, Anil; Verheyen, Peter; Collaert, Nadine; Dixit, Abhisek; Kaczer, Ben; Snow, Jim; Vos, Rita; Locorotondo, Sabrina; Degroote, Bart; Shi, Xiaoping; Rooyackers, Rita; Mannaert, Geert; Brus, Stephan; Yim, Yong Sik; Lauwers, Anne; Goodwin, Michael; Kittl, Jorge; Van Dal, Mark; Richard, Olivier; Veloso, Anabela; Kubicek, Stefan; Beckx, Stephan; Boullart, Werner; De Meyer, Kristin; Absil, Philippe; Jurczak, Gosia; Biesemans, Serge (2005) -
Co-optimization of lithographic and patterning processes for improved EPE performance
Maslow, Mark; Timoshkov, Vadim; Kiers, Ton; Jee, Tae Kwon; de Loijer, Peter; Morikita, Shinya; Demand, Mark; Metz, Andrew W; Okada, Soichiro; Kumar, Kaushik A.; Biesemans, Serge; Yaegashi, Hidetami; Di Lorenzo, Paolo; Bekaert, Joost; Mao, Ming; Beral, Christophe; Lariviere, Stephane (2017) -
Coherent transport through a double donor system in silicon
Verduijn, J.; Tettamanzi, G.; Lansbergen, G.P.; Collaert, Nadine; Biesemans, Serge; Rogge, S. (2010) -
Comparison of an L-array and a single transistor method to extract Leff and Rs in deep submicron MOSFETs
Biesemans, Serge; De Meyer, Kristin (1997) -
Comparison of the freeze-out effect in In and B doped n-MOSFETs in the range 4.2 - 300 K
Alawneh, Isam; Simoen, Eddy; Biesemans, Serge; De Meyer, Kristin; Claeys, C. (1998) -
Composition influence on the physical and electrical properties of SrxTi1-xOy-based MIM capacitors prepared by Atomic Layer Deposition using TiN bottom electrodes
Menou, Nicolas; Popovici, Mihaela Ioana; Clima, Sergiu; Opsomer, Karl; Polspoel, Wouter; Kaczer, Ben; Rampelberg, Geert; Tomida, Kazuyuki; Pawlak, Malgorzata; Detavernier, Christophe; Pierreux, Dieter; Swerts, Johan; Maes, Jan Willem; Manger, Dirk; Badylevich, M; Afanasiev, Valeri; Conard, Thierry; Favia, Paola; Bender, Hugo; Brijs, Bert; Vandervorst, Wilfried; Van Elshocht, Sven; Pourtois, Geoffrey; Wouters, Dirk; Biesemans, Serge; Kittl, Jorge (2009) -
Comprehensive analysis of the impact of single and arrays of through silicon vias induced stress on high-k / metal gate CMOS performances
Mercha, Abdelkarim; Van der Plas, Geert; Moroz, V.; De Wolf, Ingrid; Asimakopoulos, Panagiotis; Minas, Nikolaos; Domae, Shinichi; Perry, Dan; Choi, M.; Redolfi, Augusto; Okoro, Chukwudi; Yang, Yu; Van Olmen, Jan; Thangaraju, Sarasvathi; Sabuncuoglu Tezcan, Deniz; Soussan, Philippe; Cho, Jong Hoon; Yakovlev, A.; Marchal, Pol; Travaly, Youssef; Beyne, Eric; Biesemans, Serge; Swinnen, Bart (2010) -
Cost effective low Vt Ni-FUSI CMOS on SiON by means of Al implant (pMOS) and Yb+P implant (nMOS)
Lauwers, Anne; Veloso, Anabela; Chang, Shou-Zen; Yu, HongYu; Hoffmann, Thomas Y.; Kerner, Christoph; Demand, Marc; Rothschild, Aude; Niwa, Masaaki; Satoru, Ito; Mitshashi, Riichirou; Ameen, Mike; Whittemore, Graham; Pawlak, Malgorzata; Vrancken, Christa; Demeurisse, Caroline; Mertens, Sofie; Vandervorst, Wilfried; Absil, Philippe; Biesemans, Serge; Kittl, Jorge (2008) -
Crystallization study of thin ZrO2 ALD films on Al203 and on TiN for DRAM MIMCAP applications
Pawlak, Malgorzata; Menou, Nicolas; Wang, Xin Peng; Dilliway, G.; Pierreux, D.; Fischer, P.; Vos, Rita; Hoyer, R.; Kittl, Jorge; Wouters, Dirk; Biesemans, Serge (2008) -
Current status and addressing the challenges of Hf-based gate stack toward 45nm-LSTP application
Niwa, Masaaki; Mitsuhashi, Riichirou; Yamamoto, K.; Hayashi, S.; Harada, Yoshinao; Rothschild, Aude; Hoffmann, Thomas Y.; Kubicek, Stefan; De Gendt, Stefan; Heyns, Marc; Biesemans, Serge; Kubota, M. (2005-10) -
Defect profiling and the role of nitrogen in lanthanum oxide-capped high-k dielectrics for nMOS applications
O'Sullivan, Barry; Mitsuhashi, Riichirou; Okawa, Hiroshi; Sengoku, Naohisa; Schram, Tom; Groeseneken, Guido; Biesemans, Serge; Nakabayashi, Takashi; Ikeda, Atsushi; Niwa, Masaaki (2008-09) -
Defining a 'charge vector' and its use in the treatment of the short channel effect in deep submicron MOSFETs
Biesemans, Serge; De Meyer, Kristin (1997) -
Demonstration of asymmetric gate-oxide thickness four-terminal FinFETs having flexible threshold voltage and good subthreshold slope
Masahara, Meishoku; Surdeanu, Radu; Witters, Liesbeth; Doornbos, Gerben; Nguyen Hoang, Viet; Van den Bosch, Geert; Vrancken, Christa; Devriendt, Katia; Neuilly, Francois; Kunnen, Eddy; Jurczak, Gosia; Biesemans, Serge (2007-03) -
Demonstration of fully Ni-silicided metal gates on HfO2 based high-k gate dielectrics as a candidate for low power applications
Kottantharayil, Anil; Veloso, Anabela; Kubicek, Stefan; Schram, Tom; Augendre, Emmanuel; de Marneffe, Jean-Francois; Devriendt, Katia; Lauwers, Anne; Brus, Stephan; Henson, Kirklen; Biesemans, Serge (2004-06) -
Demonstration of low Vt Ni-FUSI N-MOSFETs with SiON dielectrics by using a Dy2O3 cap layer
Yu, HongYu; Chang, Shou-Zen; Veloso, Anabela; Lauwers, Anne; Adelmann, Christoph; Onsia, Bart; Lehnen, Peer; Kauerauf, Thomas; Brus, Stephan; Absil, Philippe; Biesemans, Serge (2007-11)