Browsing imec Publications by imec author "2e8a8522bb9f831b95ac2dc3cf698c12bc04b1b7"
Now showing items 1-20 of 127
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10x10nm2 Hf/HfOx crossbar resistive RAM with excellent performance, reliability and low-energy operation
Govoreanu, Bogdan; Kar, Gouri Sankar; Chen, Yangyin; Paraschiv, Vasile; Kubicek, Stefan; Fantini, Andrea; Radu, Iuliana; Goux, Ludovic; Clima, Sergiu; Degraeve, Robin; Jossart, Nico; Richard, Olivier; Vandeweyer, Tom; Seo, Kyungah; Hendrickx, Paul; Pourtois, Geoffrey; Bender, Hugo; Altimime, Laith; Wouters, Dirk; Kittl, Jorge; Jurczak, Gosia (2011) -
A highly reliable 3-dimensional integrated SBT ferroelectric capacitor enabling FeRAM scaling
Goux, Ludovic; Russo, G.; Menou, N.; Lisoni, Judit; Schwitters, M.; Paraschiv, Vasile; Maes, David; Artoni, C.; Corallo, G.; Haspeslagh, Luc; Wouters, Dirk; Zambrano, R.; Muller, Ch. (2005-04) -
A low-power HKMG CMOS platform compatible with DRAM node 2x and beyond
Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; Caillat, Christian; Aoulaiche, Marc; Cho, Moon Ju; Noh, Kyung Bong; Son, Yunik; Na, Hoon Jo; Kauerauf, Thomas; Douhard, Bastien; Nazir, Aftab; Chew, Soon Aik; Milenin, Alexey; Altamirano Sanchez, Efrain; Schoofs, Geert; Albert, Johan; Sebaai, Farid; Vecchio, Emma; Paraschiv, Vasile; Vandervorst, Wilfried; Lee, Sun Ghil; Collaert, Nadine; Fazan, Pierre; Horiguchi, Naoto; Thean, Aaron (2014) -
a-VMCO: a novel forming-free, self-rectifying analog memory cell with low-current operation, nonfilamentary switching and excellent variability
Govoreanu, Bogdan; Crotti, Davide; Subhechha, Subhali; Zhang, Leqi; Chen, Yangyin; Clima, Sergiu; Paraschiv, Vasile; Hody, Hubert; Adelmann, Christoph; Popovici, Mihaela Ioana; Richard, Olivier; Jurczak, Gosia (2015) -
Advanced wafer surface cleaning technology
Mertens, Paul; Vos, Rita; Vereecke, Guy; Arnauts, Sophia; Bearda, Twan; De Waele, Rita; Eitoku, Atsuro; Fyen, Wim; Geckiere, J.; Hellin, David; Holsteyns, Frank; Kesters, Els; Claes, Martine; Kenis, Karine; Kraus, Harald; Malhouitre, Stephane; Lee, Kuntack; Kocsis, Michael; Onsia, Bart; Garaud, Sylvain; Rip, Jens; Snow, Jim; Teerlinck, I.; Van Hoeymissen, Jan; Barbagini, Francesca; Xu, Kaidong; Paraschiv, Vasile; De Gendt, Stefan; Mannaert, Geert; Heyns, Marc (2004) -
Challenges and opportunities of vertical FET devices using 3D circuit design layouts
Veloso, Anabela; Huynh Bao, Trong; Rosseel, Erik; Paraschiv, Vasile; Devriendt, Katia; Vecchio, Emma; Delvaux, Christie; Chan, BT; Ercken, Monique; Tao, Zheng; Li, Waikin; Altamirano Sanchez, Efrain; Versluijs, Janko; Brus, Stephan; Matagne, Philippe; Waldron, Niamh; Ryckaert, Julien; Mocuta, Dan; Collaert, Nadine (2016) -
Challenges on surface conditioning in 3D device architectures: triple-gate FinFETs, gate-all-around lateral and vertical nanowire FETs
Veloso, Anabela; Paraschiv, Vasile; Vecchio, Emma; Devriendt, Katia; Li, Waikin; Simoen, Eddy; Chan, BT; Tao, Zheng; Rosseel, Erik; Loo, Roger; Milenin, Alexey; Kunert, Bernardette; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; van Dorp, Dennis; Altamirano Sanchez, Efrain; Brus, Stephan; Marien, Philippe; Fleischmann, Claudia; Melkonyan, Davit; Huynh Bao, Trong; Eneman, Geert; Hellings, Geert; Sibaja-Hernandez, Arturo; Matagne, Philippe; Waldron, Niamh; Mocuta, Dan; Collaert, Nadine (2017) -
Challenges on surface conditioning in 3D device architectures: triple-gate finFETs, gate-all-around lateral and vertical nanowireFETs
Veloso, Anabela; Paraschiv, Vasile; Vecchio, Emma; Devriendt, Katia; Li, Waikin; Simoen, Eddy; Chan, BT; Tao, Zheng; Rosseel, Erik; Loo, Roger; Milenin, Alexey; Kunert, Bernardette; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; van Dorp, Dennis; Altamirano Sanchez, Efrain; Brus, Stephan; Marien, Philippe; Sibaja-Hernandez, Arturo; Matagne, Philippe; Waldron, Niamh; Mocuta, Dan; Collaert, Nadine (2017) -
Cleaning challenges of high-k/metal gate structures
Hussain, Muhammad M.; Shamiryan, Denis; Paraschiv, Vasile; Sano, Kenichi; Reinhardt, Karen A. (2011) -
CMP process steps for the fabrication of spin-transfer torque magnetic random access memory
Tsvetanova, Diana; Heylen, Nancy; Teugels, Lieve; Crotti, Davide; Donadio, Gabriele Luca; Kar, Gouri Sankar; Struyf, Herbert; Souriau, Laurent; Mertens, Sofie; Swerts, Johan; Couet, Sebastien; Lin, Tsann; Paraschiv, Vasile; Kim, Woojin; Rao, Siddharth (2016) -
Complexation of phenolic guests by endo- and exo-hydrogen-bonded receptors
Kerckhoffs, J.M.C.A.; Ishi-i, T.; Paraschiv, Vasile; Timmerman, Peter; Crego-Calama, Mercedes; Shinkai, Seiji; Reinhoudt, David N. (2003) -
Composition control and ferroelectric properties of sidewall Sr0.8Bi2.2Ta2O9 in integrated 3-Dimensional ferroelectric capacitors
Goux, Ludovic; Lisoni, Judit; Schwitters, Michael; Paraschiv, Vasile; Maes, D.; Haspeslagh, Luc; Wouters, Dirk; Menou, M.; Turquat, Ch.; Madigou, V.; Muller, Ch.; Zambrano, R. (2005) -
Composition control and ferrolectric properties of sidewalls in three-dimensional SrBi2Ta2O9-based ferroelectric capacitors
Goux, Ludovic; Lisoni, Judit; Schwitters, Michael; Paraschiv, Vasile; Maes, David; Haspeslagh, Luc; Wouters, Dirk; Menou, N.; Turquat, Ch.; Madigou, V.; Muller, Ch.; Zambrano, R. (2005-09) -
Development of AlGaN recess etch for Emode POWER HEMTs
Mannaert, Geert; Paraschiv, Vasile; De Jaeger, Brice; Van Hove, Marleen; Demand, Marc; Decoutere, Stefaan; Boullart, Werner (2012) -
Double patterning with dual hard mask for 28nm node devices and below
Hody, Hubert; Paraschiv, Vasile; Vecchio, Emma; Locorotondo, Sabrina; Winroth, Gustaf; Athimulam, Raja; Boullart, Werner (2013) -
Double patterning with dual hard mask for 28nm node devices and below
Hody, Hubert; Paraschiv, Vasile; Vecchio, Emma; Locorotondo, Sabrina; Winroth, Gustaf; Athimulam, Raja; Boullart, Werner (2013) -
Dry etch of Yb-doped poly-Si gates for low Vt FUSI devices
Demand, Marc; Paraschiv, Vasile; Shamiryan, Denis; Vrancken, Christa; Brus, Stephan; Veloso, Anabela; Boullart, Werner (2007) -
Dry etch processing of Multiple Gate FETs with metal gate electrode
Demand, Marc; Paraschiv, Vasile; Shamiryan, Denis; Beckx, Stephan; Boullart, Werner; Vanhaelemeersch, Serge (2005) -
Dry etching fin process for SOI finFET manufacturing: Transition from 32 to 22 nm 3 node on a 6T-SRAM cell
Altamirano Sanchez, Efrain; Paraschiv, Vasile; Demand, Marc; Boullart, Werner (2011) -
Dry etching of Mo based layers and its interdependence with a poly-Si/MoOxNy/TiN/HfO2 gate stack
Paraschiv, Vasile; Boullart, Werner; Altamirano Sanchez, Efrain (2013)