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Browsing by Author "Cho, Hag-Ju"

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    A 50nm high-k poly silicon gate stack with a buried SiGe channel

    Jakschik, S.
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    Hoffmann, Thomas Y.
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    Cho, Hag-Ju
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    Veloso, Anabela  
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    Loo, Roger  
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    Hyun, S.
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    Sorada, H.
    Proceedings paper
    2007, International Symposium on VLSI Technology, Systems and Applications, 23/04/2007
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    A Dy2O3-capped HfO2 dielectric and TaCx-based metals enabling low-Vt single-metal-single-dielectric gate stack

    Chang, Vincent
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    Ragnarsson, Lars-Ake  
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    Pourtois, Geoffrey  
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    O'Connor, Robert
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    Adelmann, Christoph  
    Proceedings paper
    2007, Technical Digest International Electron Devices Meeting - IEDM, 10/12/2007, p.535-538
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    Achieving conduction band-edge effective work functions by La2O3 capping of hafnium silicates

    Ragnarsson, Lars-Ake  
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    Chang, Vincent
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    Yu, HongYu
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    Cho, Hag-Ju
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    Conard, Thierry  
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    Yin, KaiMin
    Journal article
    2007-06, IEEE Electron Device Letters, (28) 6, p.486-488
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    Demonstration of metal-gated low Vt n-MOSFETs using a Poly-Si/TaN/Dy2O3/SiON gate stack with a scaled EOT value

    Yu, HongYu
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    Singanamalla, Raghunath
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    Ragnarsson, Lars-Ake  
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    Chang, Vincent
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    Cho, Hag-Ju
    Journal article
    2007, IEEE Electron Device Letters, (28) 7, p.656-658
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    DyScHfO as high-k gate dielectric: structural and electrical properties

    Adelmann, Christoph  
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    Van Elshocht, Sven  
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    Lehnen, Peer
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    Conard, Thierry  
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    Franquet, Alexis  
    Proceedings paper
    2007, Advanced Gate Stack, Source/Drain and Channel Engineering for Si-based CMOS 3: New Materials, Processes and Equipment, 6/05/2007, p.113-120
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    Investigation on molybdenum and its conductive oxides as p-type metal gate candidates

    Li, Zilan
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    Schram, Tom  
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    Witters, Thomas  
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    Cho, Hag-Ju
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    O'Sullivan, Barry  
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    Hooker, Jacob
    Proceedings paper
    2007, Physics and Technology of High-k Dielectrics, 7/10/2007, p.575-583
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    Investigation on molybdenum and its conductive oxides as p-type metal gate candidates

    Li, Zilan
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    Schram, Tom  
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    Witters, Thomas  
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    Cho, Hag-Ju
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    O'Sullivan, Barry  
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    Yamada, Naoki
    Journal article
    2008, Journal of the Electrochemical Society, (155) 7, p.H481
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    Low VT CMOS using doped Hf-based oxides, TaC-based metals and laser-only anneal

    Kubicek, Stefan  
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    Schram, Tom  
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    Paraschiv, Vasile  
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    Vos, Rita  
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    Demand, Marc  
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    Adelmann, Christoph  
    Proceedings paper
    2007, Technical Digest International Electron Devices Meeting - IEDM, 10/12/2007, p.49-52
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    Low VT metal-gate/high-k nMOSFETs - PBTI dependence and VT tune-ability on La/Dy-capping layer locations and laser annealing conditions

    Chang, Shou-Zen
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    Hoffmann, Thomas Y.
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    Yu, HongYu
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    Aoulaiche, Marc
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    Rohr, Erika
    Proceedings paper
    2008, Symposium on VLSI Technology, 17/06/2008, p.62-63
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    Nitrogen profile and dielectric cap layer (Al2O3, Dy2O3, La2O3) engineering on Hf-silicate

    Cho, Hag-Ju
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    Yu, HongYu
    ;
    Ragnarsson, Lars-Ake  
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    Chang, Vincent
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    Schram, Tom  
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    O'Sullivan, Barry  
    Proceedings paper
    2007, IEEE International Conference on IC Design and Technology - ICICDT, 30/05/2007, p.114-116
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    Novel process to pattern selectively dual dielectric capping layers using soft-mask only

    Schram, Tom  
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    Kubicek, Stefan  
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    Rohr, Erika
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    Brus, Stephan  
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    Vrancken, Christa  
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    Chang, Shou-Zen
    Proceedings paper
    2008, Symposium on VLSI Technology Digest of Technical Papers, 17/06/2008, p.44-45
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    Oxygen-vacancy-induced Vt shift in La-containing devices

    O'Sullivan, Barry  
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    Mitsuhashi, Riichirou
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    Pourtois, Geoffrey  
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    Chang, Vincent
    Proceedings paper
    2007, Extended Abstracts of the International Conference on Solid State Devices and Materials - SSDM, 19/09/2007, p.372-373
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    Strain enhanced Low-VT CMOS featuring La/Al-doped HfSiO/TaC and 10ps invertor delay

    Kubicek, Stefan  
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    Schram, Tom  
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    Rohr, Erika
    ;
    Paraschiv, Vasile  
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    Vos, Rita  
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    Demand, Marc  
    Proceedings paper
    2008, Symposium on VLSI Technology Digest of Technical Papers, 17/06/2008, p.130-131
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    The impact of stacked cap layers on effective work function with HfSiON and SiON gate dielectrics

    Cho, Hag-Ju
    ;
    Yu, Hong Yu
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    Chang, Vincent S.
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    Akheyar, Amal
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    Jakschik, Stefan
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    Conard, Thierry  
    Journal article
    2008-07, IEEE Electron Device Letters, (29) 7, p.743-745
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    Understanding and prediction of EWF modulation induced by various dopants in the gate stack for a gate-first integration scheme

    Wang, Xin Peng
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    Yu, HongYu
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    Yeo, Y.-C.
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    Li, M.-F.
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    Chang, Shou-Zen
    ;
    Cho, Hag-Ju
    ;
    Kubicek, Stefan  
    Proceedings paper
    2008, Symposium on VLSI Technology. Digest of Technical Papers, 17/06/2008, p.162-163

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