Browsing by Author "Magnone, Paolo"
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Publication A distributed electrical model for interdigitated back contact silicon solar cells
Proceedings paper2014, Proceedigns of the 4th International Conference on Crystalline Silicon Photovoltaics - SiliconPV, 25/03/2014, p.71-76Publication Buried silicon-germanium pMOSFETs: experimental analysis in VLSI logic circuits under aggressive voltage scaling
Journal article2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, (20) 8, p.1487-1495Publication Early assessment of emerging technologies for VLSI logic circuits from experimental measurements
Proceedings paper2012, IEEE International Conference on Solid-State and Integrated Circuit Technology - ICSICT, 29/10/2012Publication Experimental analysis of buried SiGe pMOSFETs from the perspective of aggressive voltage scaling
Proceedings paper2011, IEEE International Symposium on Circuits and Systems - ISCAS, 15/05/2011, p.2249-2252Publication Fermi-level pinning at polycrystalline silicon-HfO2 interface as a source of drain and gate current 1/f noise
;Magnone, Paolo ;Crupi, Felice ;Pantisano, LuigiPace, CalogeroJournal article2007, Applied Physics Letters, (90) 7, p.73507Publication Gate voltage and geometry dependence of the series resistance and of the carrier mobility in FinFET devices
Journal article2008, Microelectronic Engineering, (85) 3, p.1728-1731Publication High-mobility 0.85nm-EOT Si0.45Ge0.55 pFETs: delivering high performance at scaled VDD
Proceedings paper2010, IEEE International Electron Devices Meeting - IEDM, 6/12/2010, p.249-252Publication Investigation of the p-GaN gate breakdown in forward-biased GaN-based power HEMTs
Journal article2017, IEEE Electron Device Letters, (38) 1, p.99-102Publication Matching performance of FinFET devices with fin widths down to 10nm
Journal article2009, IEEE Electron Device Letters, (30) 12, p.1374-1376Publication On the impact of defects close to the gate electrode on the low-frequency 1/f noise
;Magnone, Paolo ;Pantisano, Luigi ;Crupi, Felice ;Trojman, Lionel ;Pace, CalogeroGiusi, GinoJournal article2008, IEEE Electron Devices Letters, 29, p.1056-1058Publication PBTI in GaN-HEMT's with p-type gate: role of the aluminum content on DVtH and underlying degradation mechanisms
Journal article2018, IEEE Transactions on Electron Devices, (65) 1, p.38-44Publication Understanding the basic advantages of bulk FinFETs for sub- and near-threshold logic from device measurements
Journal article2012, IEEE Transactions on Circuits and Systems II: Express Briefs, (59) 7, p.439-442Publication Understanding the degradation sources under ON-state stress in AlGaN/GaN-on-Si SBD: Investigation of the anode-cathode apacing length dependence
Proceedings paper2016, IEEE International Reliability Physics Symposium, 17/04/2016, p.4A.5Publication Understanding the influence of busbars in large-area IBC solar cells by distributed SPICE simulations
Journal article2015, IEEE Journal of Photovoltaics, (5) 2, p.552-558