Browsing by Author "Milojevic, Dragomir"

2D vs 3D integration: Architecture-technology co-design for future mobile MPSoC platforms

3-D Integration from system design perspective

3D Partitioning with Pipeline Optimization for Low-Latency Memory Access in Many-Core SoCs

3D SoC integration, beyond 2.5D chiplets

3D-convolution based fast transient thermal model for 3D integrated circuits: methodology and applications

3D-optimized SRAM Macro Design and Application to Memory-on-Logic 3D-IC at Advanced Nodes

3D-stacked integrated circuits: design consequences, architectural aspects, design methodologies and tools

An analytical compact model for estimation of stress in multiple through-silicon via configurations

Automated PathFinding tool chain for 3D-stacked integrated circuits: practical case study

Bandwidth-Latency-Thermal Co-Optimization of Interconnect-Dominated Many-Core 3D-IC

Concepts and implementation of spatial division multiplexing for guaranteed throughput in networks-on-chip

Cost-performance optimisation of fine-pitch W2W bonding: functional system partitioning with heterogeneous FEOL/BEOL configurations

Cost-performance optimization of fine-pitch W2W bonding: functional system partitioning with heterogeneous FEOL/BEOL configurations

Design and Optimization of SRAM Macro and Logic Using Backside Interconnects at 2nm node

Design And Sign-off Methodologies For Wafer-To-Wafer Bonded 3D-ICs At Advanced Nodes (invited)

Design Enablement of 3-Dies Stacked 3D-ICs Using Fine-Pitch Hybrid-Bonding and TSVs

Design enablement of fine pitch face-to-face 3D system integration using die-by-die place & route

Design issues in heterogeneous 3D/2.5D integration

Evaluation of Nanosheet and Forksheet Width Modulation for Digital IC Design in the Sub-3 nm Era

Fine-pitch 3D System Integration and Advanced CMOS nodes: Technology and System Design Perspective