Browsing by Author "Waldron, Niamh"
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Publication 15nm-WFIN high-performance low-defectivity strained-germanium pFinFETs with low temperature STI-last process
Proceedings paper2014, Symposium on VLSI Technology, 9/06/2014, p.138-139Publication 3D sequential low temperature top tier devices using dopant activation with excimer laser anneal and strained silicon as performance boosters
Proceedings paper2020, IEEE Symposium on VLSI Technology and Circuits, JUN 15-19, 2020Publication 3D sequential stacked planar devices featuring low-temperature replacement metal gate junctionless top devices with improved reliability
; ; ; ; ; Journal article2018-11, IEEE Transactions on Electron Devices, (65) 11, p.5165-5171Publication 3D sequential stacked planar devices on 300 mm wafers featuring replacement metal gate junction-less top devices processed at 525°C with improved reliability
; ; ; ; ; Proceedings paper2018, IEEE Symposium on VLSI Technology, 18/06/2018, p.69-70Publication 3D technologies for analog/RF applications
Proceedings paper2017, IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference - IEEE S3S, 16/10/2017, p.13.1Publication A defect characterization technique for the sidewall surface of Nano-ridge and Nanowire based Logic and RF technologies
Proceedings paper2021, IEEE International Reliability Physics Symposium (IRPS), MAR 21-24, 2021Publication Advanced channel materials for the semiconductor industry
Proceedings paper2015, IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference - S3S, 4/10/2015, p.1-5Publication Advanced semiconductor devices for future CMOS technologies
Proceedings paper2015, Advanced CMOS-Compatible Semiconductor Devices 17, 25/05/2015, p.49-60Publication Advanced transistors for high frequency applications
Proceedings paper2020, 237th ECS Spring Meeting - Advanced CMOS-compatible Semiconductor Devices 19, 10/05/2020, p.27-38Publication AlGaN/GaN MISHEMT analysis from an analog point of view up to 150 oC
Proceedings paper2020, EUROSOI/ULIS 2020, 31/03/2020Publication An InGaAs/InP quantum well FinFET using the replacement fin process integrated in an RMG flow on 300mm Si substrates
Proceedings paper2014, IEEE Symposium on VLSI Technology, 11/06/2014, p.1-2Publication Analysis of gate-metal resistance in CMOS-compatible RF GaN HEMTs
Journal article2020, IEEE Transactions on Electron Devices, (67) 11, p.4592-4596Publication Application of an Sb Surfactant in InGaAs Nano-ridge Engineering on 300 mm Silicon Substrates
Journal article2021, CRYSTAL GROWTH & DESIGN, (21) 3, p.1657-1665Publication Are extended defects a show stopper for future III-V CMOS technologies?
; ; ; ; Proceedings paper2018-06, 19th International Conference on Extended Defects in Semiconductors - EDS, 24/06/2018Publication Beyond-Si materials and devices for more Moore and more than Moore applications
Proceedings paper2016, International Conference on IC Design and Technology - ICICDT, 27/06/2016, p.1-5Publication Bias Temperature Instability (BTI) in high-mobility channel devices with high-k dielectric stacks: SiGe, Ge, and InGaAs
Journal article2016, MRS Advances, (1) 49, p.3329-3340Publication Bias Temperature Instability (BTI) in high-mobility channel devices: SiGe, Ge, and InGaAs
Proceedings paper2016, Workshop on Dielectrics in Microelectronics - WoDiM, 27/06/2016Publication BTI reliability of advanced gate stacks for beyond silicon devices: challenges and opportunities
Proceedings paper2014-12, International Electron Device Meeting - IEDM, 15/12/2014, p.828-831Publication BTI reliability of high-mobility channel devices: SiGe, Ge and InGaAs
Proceedings paper2014, IEEE Integrated International Reliability Workshop - IIRW, 12/10/2014Publication Buried metal line compatible with 3D sequential integration for top tier planar devices dynamic Vth tuning and RF shielding applications
Proceedings paper2019, 2019 Symposia on VLSI Technology and Circuits, 9/06/2019, p.T56-T57