Browsing by author "Vecchio, Emma"
Now showing items 1-20 of 44
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3D sequential low temperature top tier devices using dopant activation with excimer laser anneal and strained silicon as performance boosters
Vandooren, Anne; Wu, Zhicheng; Parihar, Narendra; Franco, Jacopo; Parvais, Bertrand; Matagne, Philippe; Debruyn, Haroen; Mannaert, Geert; Devriendt, Katia; Teugels, Lieve; Vecchio, Emma; Radisic, Dunja; Rosseel, Erik; Hikavyy, Andriy; Chan, BT; Waldron, Niamh; Mitard, Jerome; Besnard, G.; Alvarez, A.; Gaudin, G.; Schwarzenbach, W.; Radu, I.; Nguyen, B. Y.; Huet, K.; Tabata, T.; Mazzamuto, F.; Demuynck, Steven; Boemmels, Juergen; Collaert, Nadine; Horiguchi, Naoto (2020) -
3D sequential stacked planar devices featuring low-temperature replacement metal gate junctionless top devices with improved reliability
Vandooren, Anne; Franco, Jacopo; Parvais, Bertrand; Wu, Zhicheng; Witters, Liesbeth; Walke, Amey; Li, Waikin; Peng, Lan; Deshpande, Veeresh Vidyadhar; Bufler, Fabian; Rassoul, Nouredine; Hellings, Geert; Jamieson, Geraldine; Inoue, Fumihiro; Verbinnen, Greet; Devriendt, Katia; Teugels, Lieve; Heylen, Nancy; Vecchio, Emma; Tao, Zheng; Rosseel, Erik; Vanherle, Wendy; Hikavyy, Andriy; Chan, BT; Ritzenthaler, Romain; Besnard, Guillaume; Schwarzenbach, Walter; Gaudin, Gweltaz; Radu, Ionut; Nguyen, Bich-Yen; Waldron, Niamh; De Heyn, Vincent; Mocuta, Dan; Collaert, Nadine (2018-11) -
3D sequential stacked planar devices on 300 mm wafers featuring replacement metal gate junction-less top devices processed at 525°C with improved reliability
Vandooren, Anne; Franco, Jacopo; Parvais, Bertrand; Wu, Zhicheng; Witters, Liesbeth; Walke, Amey; Li, Waikin; Peng, Lan; Deshpande, Veeresh Vidyadhar; Bufler, Fabian; Rassoul, Nouredine; Hellings, Geert; Jamieson, Geraldine; Inoue, Fumihiro; Verbinnen, Greet; Devriendt, Katia; Teugels, Lieve; Heylen, Nancy; Vecchio, Emma; Tao, Zheng; Rosseel, Erik; Vanherle, Wendy; Hikavyy, Andriy; Chan, BT; Ritzenthaler, Romain; Besnard, Guillaume; Schwarzenbach, Walter; Gaudin, Gweltaz; Radu, Ionut; Nguyen, Bich-Yen; Waldron, Niamh; De Heyn, Vincent; Mocuta, Dan; Collaert, Nadine (2018) -
A low-power HKMG CMOS platform compatible with DRAM node 2x and beyond
Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; Caillat, Christian; Aoulaiche, Marc; Cho, Moon Ju; Noh, Kyung Bong; Son, Yunik; Na, Hoon Jo; Kauerauf, Thomas; Douhard, Bastien; Nazir, Aftab; Chew, Soon Aik; Milenin, Alexey; Altamirano Sanchez, Efrain; Schoofs, Geert; Albert, Johan; Sebaai, Farid; Vecchio, Emma; Paraschiv, Vasile; Vandervorst, Wilfried; Lee, Sun Ghil; Collaert, Nadine; Fazan, Pierre; Horiguchi, Naoto; Thean, Aaron (2014) -
Buried metal line compatible with 3D sequential integration for top tier planar devices dynamic Vth tuning and RF shielding applications
Vandooren, Anne; Wu, Zhicheng; Khaled, Ahmad; Franco, Jacopo; Parvais, Bertrand; Li, W.; Witters, Liesbeth; Walke, Amey; Peng, Lan; Rassoul, Nouredine; Matagne, Philippe; Jamieson, Geraldine; Inoue, Fumihiro; Nguyen, B.Y.; Debruyn, Haroen; Devriendt, Katia; Teugels, Lieve; Heylen, Nancy; Vecchio, Emma; Zheng, T.; Radisic, Dunja; Rosseel, Erik; Vanherle, Wendy; Hikavyy, Andriy; Chan, BT; Besnard, G.; Schwarzenbach, W.; Gaudin, G.; Radu, Iuliana; Waldron, Niamh; De Heyn, Vincent; Demuynck, Steven; Boemmels, Juergen; Ryckaert, Julien; Collaert, Nadine; Mocuta, Dan (2019) -
Challenges and opportunities of vertical FET devices using 3D circuit design layouts
Veloso, Anabela; Huynh Bao, Trong; Rosseel, Erik; Paraschiv, Vasile; Devriendt, Katia; Vecchio, Emma; Delvaux, Christie; Chan, BT; Ercken, Monique; Tao, Zheng; Li, Waikin; Altamirano Sanchez, Efrain; Versluijs, Janko; Brus, Stephan; Matagne, Philippe; Waldron, Niamh; Ryckaert, Julien; Mocuta, Dan; Collaert, Nadine (2016) -
Challenges on surface conditioning in 3D device architectures: triple-gate FinFETs, gate-all-around lateral and vertical nanowire FETs
Veloso, Anabela; Paraschiv, Vasile; Vecchio, Emma; Devriendt, Katia; Li, Waikin; Simoen, Eddy; Chan, BT; Tao, Zheng; Rosseel, Erik; Loo, Roger; Milenin, Alexey; Kunert, Bernardette; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; van Dorp, Dennis; Altamirano Sanchez, Efrain; Brus, Stephan; Marien, Philippe; Fleischmann, Claudia; Melkonyan, Davit; Huynh Bao, Trong; Eneman, Geert; Hellings, Geert; Sibaja-Hernandez, Arturo; Matagne, Philippe; Waldron, Niamh; Mocuta, Dan; Collaert, Nadine (2017) -
Challenges on surface conditioning in 3D device architectures: triple-gate finFETs, gate-all-around lateral and vertical nanowireFETs
Veloso, Anabela; Paraschiv, Vasile; Vecchio, Emma; Devriendt, Katia; Li, Waikin; Simoen, Eddy; Chan, BT; Tao, Zheng; Rosseel, Erik; Loo, Roger; Milenin, Alexey; Kunert, Bernardette; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; van Dorp, Dennis; Altamirano Sanchez, Efrain; Brus, Stephan; Marien, Philippe; Sibaja-Hernandez, Arturo; Matagne, Philippe; Waldron, Niamh; Mocuta, Dan; Collaert, Nadine (2017) -
Composition quantification of microelectronics multilayer thin films by EDX: toward small scale analysis
Conard, Thierry; Arstila, Kai; Hantschel, Thomas; Franquet, Alexis; Vandervorst, Wilfried; Vecchio, Emma; Bauer, Frank; Burgess, Simon (2009) -
Double patterning with dual hard mask for 28nm node devices and below
Hody, Hubert; Paraschiv, Vasile; Vecchio, Emma; Locorotondo, Sabrina; Winroth, Gustaf; Athimulam, Raja; Boullart, Werner (2013) -
Double patterning with dual hard mask for 28nm node devices and below
Hody, Hubert; Paraschiv, Vasile; Vecchio, Emma; Locorotondo, Sabrina; Winroth, Gustaf; Athimulam, Raja; Boullart, Werner (2013) -
Double-gate Si junction-less n-type transistor for high performance Cu-BEOL compatible applications using 3D sequential integration
Vandooren, Anne; Witters, Liesbeth; Vecchio, Emma; Kunnen, Eddy; Hellings, Geert; Peng, Lan; Inoue, Fumihiro; Li, Waikin; Waldron, Niamh; Mocuta, Dan; Collaert, Nadine (2017) -
Epitaxial Ge-on-Nothing and Epitaxial Ge on Si-on-Nothing as Virtual Substrates for 3D Device Stacking Technologies
Loo, Roger; Porret, Clément; Han, Han; Srinivasan, Ashwyn; Vecchio, Emma; Depauw, Valerie (2021) -
Fabrication challenges in integrating self-assembled block copolymer process in semiconductor devices
Seema Saseendran, Sandeep; Paneri, Abhilash; Tobback, Bert; Kutrzeba Kotowska, Bogumila; Vecchio, Emma; Jamieson, Geraldine; Paraschiv, Vasile; Figeys, Bruno; Suh, Hyo Seon; Sabuncuoglu Tezcan, Deniz; Takahashi, Kohei; Fujikane, Masaki; Himeno, Atsushi; Nakamura, Kunihiko; Tambo, Naoki; Nakata, Yuki; Tanaka, Hiroyuki; Naito, Yasuyuki (2020) -
First demonstration of 3D stacked Finfets at a 45nm fin pitch and 110nm gate pitch technology on 300mm wafers
Vandooren, Anne; Franco, Jacopo; Wu, Zhicheng; Parvais, Bertrand; Li, Waikin; Walke, Amey; Peng, Lan; Deshpande, Paru; Rassoul, Nouredine; Hellings, Geert; Jamieson, Geraldine; Inoue, Fumihiro; Devriendt, Katia; Teugels, Lieve; Heylen, Nancy; Vecchio, Emma; Zheng, T.; Rosseel, Erik; Vanherle, Wendy; Hikavyy, Andriy; Mannaert, Geert; Chan, BT; Ritzenthaler, Romain; Mitard, Jerome; Ragnarsson, Lars-Ake; Waldron, Niamh; De Heyn, Vincent; Demuynck, Steven; Boemmels, Juergen; Mocuta, Dan; Ryckaert, Julien; Collaert, Nadine (2018) -
First demonstration of monocrystalline silicon macaroni channel for 3-D NAND memory devices
Delhougne, Romain; Arreghini, Antonio; Rosseel, Erik; Hikavyy, Andriy; Vecchio, Emma; Zhang, Liping; Pak, Murat; Nyns, Laura; Raymaekers, Tom; Jossart, Nico; Breuil, Laurent; Vadakupudhu Palayam, Senthil; Tan, ChiLim; Van den Bosch, Geert; Furnemont, Arnaud (2018) -
First demonstration of strained Ge-in-STI IFQW pFETs featuring raised SiGe75% S/D, replacement metal gate and germanided local interconnects
Mitard, Jerome; Witters, Liesbeth; Vincent, Benjamin; Franco, Jacopo; Favia, Paola; Hikavyy, Andriy; Eneman, Geert; Loo, Roger; Brunco, David; Kabir, Nafees; Bender, Hugo; Sebaai, Farid; Vos, Rita; Mertens, Paul; Milenin, Alexey; Vecchio, Emma; Ragnarsson, Lars-Ake; Collaert, Nadine; Thean, Aaron (2013) -
First demonstration of vertically stacked ferroelectric Al doped HfO2 devices for NAND applications
Florent, Karine; Lavizzari, Simone; Di Piazza, Luca; Popovici, Mihaela Ioana; Vecchio, Emma; Potoms, Goedele; Groeseneken, Guido; Van Houdt, Jan (2017) -
Gate-all-around NWFETs vs. triple-gate FinFETs: junctionless vs. extensionless and conventional junction devices with controlled EWF modulation for multi-VT CMOS
Veloso, Anabela; Hellings, Geert; Cho, Moon Ju; Simoen, Eddy; Devriendt, Katia; Paraschiv, Vasile; Vecchio, Emma; Tao, Zheng; Versluijs, Janko; Souriau, Laurent; Dekkers, Harold; Brus, Stephan; Geypen, Jef; Lagrain, Pieter; Bender, Hugo; Eneman, Geert; Matagne, Philippe; De Keersgieter, An; Fang, W.; Collaert, Nadine; Thean, Aaron (2015) -
Highly scalable effective work function engineering approach for multi-VT modulation of planar and FinFET-based RMG high-k last devies for (sub-)22nm nodes
Veloso, Anabela; Boccardi, Guillaume; Ragnarsson, Lars-Ake; Higuchi, Yuichi; Lee, Jae Won; Simoen, Eddy; Roussel, Philippe; Cho, Moon Ju; Chew, Soon Aik; Schram, Tom; Dekkers, Harold; Van Ammel, Annemie; Witters, Thomas; Brus, Stephan; Dangol, Anish; Paraschiv, Vasile; Vecchio, Emma; Shi, Xiaoping; Sebaai, Farid; Kellens, Kristof; Heylen, Nancy; Devriendt, Katia; Richard, Olivier; Bender, Hugo; Chiarella, Thomas; Arimura, Hiroaki; Thean, Aaron; Horiguchi, Naoto (2013)