Browsing by author "Degroote, Bart"
Now showing items 1-17 of 17
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A 0.314mm2 6T-SRAM cell built with tall triple-gate devices for 45nm node applications using 0.75NA 193nm lithography
Nackaerts, Axel; Ercken, Monique; Demuynck, Steven; Lauwers, Anne; Baerts, Christina; Bender, Hugo; Boullart, Werner; Collaert, Nadine; Degroote, Bart; Delvaux, Christie; de Marneffe, Jean-Francois; Dixit, Abhisek; De Meyer, Kristin; Hendrickx, Eric; Heylen, Nancy; Jaenen, Patrick; Laidler, David; Locorotondo, Sabrina; Maenhoudt, Mireille; Moelants, Myriam; Pollentier, Ivan; Ronse, Kurt; Rooyackers, Rita; Van Aelst, Joke; Vandenberghe, Geert; Vandervorst, Wilfried; Vandeweyer, Tom; Vanhaelemeersch, Serge; Van Hove, Marleen; Van Olmen, Jan; Verhaegen, Staf; Versluijs, Janko; Vrancken, Christa; Wiaux, Vincent; Jurczak, Gosia; Biesemans, Serge (2004-12) -
A functional 41-stage ring oscillator using scaled FinFET devices with 25nm gate lengths and 10nm Fin widths applicable for the 45nm CMOS node
Collaert, Nadine; Dixit, Abhisek; Goodwin, Michael; Kottantharayil, Anil; Rooyackers, Rita; Degroote, Bart; Leunissen, Peter; Veloso, Anabela; Jonckheere, Rik; De Meyer, Kristin; Jurczak, Gosia; Biesemans, Serge (2004-08) -
A low-power multi-gate FET CMOS technology with 13.9ps inverter delay, large-scale integrated high performance digital circuits and SRAM
von Arnim, Klaus; Augendre, Emmanuel; Pacha, C.; Schulz, Thomas; San, Kemal Tamer; Bauer, F.; Nackaerts, Axel; Rooyackers, Rita; Vandeweyer, Tom; Degroote, Bart; Collaert, Nadine; Dixit, Abhisek; Singanamalla, Raghunath; Xiong, W.; Marshall, A.; Cleavelin, C.R.; Schrüfer, K.; Jurczak, Gosia (2007) -
Challenges in patterning 45nm node multiple-gate devices and SRAM cells
Ercken, Monique; Delvaux, Christie; Baerts, Christina; Locorotondo, Sabrina; Degroote, Bart; Wiaux, Vincent; Nackaerts, Axel; Rooyackers, Rita; Verhaegen, Staf; Pollentier, Ivan (2004) -
CMP-less integration of fully Ni-silicided metal gates in FinFETs by simultaneous silicidation of the source, drain, and the gate using a novel dual hard mask approach
Kottantharayil, Anil; Verheyen, Peter; Collaert, Nadine; Dixit, Abhisek; Kaczer, Ben; Snow, Jim; Vos, Rita; Locorotondo, Sabrina; Degroote, Bart; Shi, Xiaoping; Rooyackers, Rita; Mannaert, Geert; Brus, Stephan; Yim, Yong Sik; Lauwers, Anne; Goodwin, Michael; Kittl, Jorge; Van Dal, Mark; Richard, Olivier; Veloso, Anabela; Kubicek, Stefan; Beckx, Stephan; Boullart, Werner; De Meyer, Kristin; Absil, Philippe; Jurczak, Gosia; Biesemans, Serge (2005) -
Doubling or quadrupling MuGFET Fin integration scheme with higher pattern fidelity, lower CD variation and higher layout efficiency
Rooyackers, Rita; Augendre, Emmanuel; Degroote, Bart; Collaert, Nadine; Nackaerts, Axel; Dixit, Abhisek; Vandeweyer, Tom; Pawlak, Bartek; Ercken, Monique; Kunnen, Eddy; Dilliway, Gabriela; Leys, Frederik; Loo, Roger; Jurczak, Gosia; Biesemans, Serge (2007) -
Highly manufacturable FinFETs with sub-10nm fin width and high aspect ratio fabricated with immersion lithography
Van Dal, Mark; Collaert, Nadine; Doornbos, Gerben; Vellianitis, Georgios; Curatola, Gilberto; Pawlak, Bartek; Duffy, Ray; Jonville, Carole; Degroote, Bart; Altamirano Sanchez, Efrain; Kunnen, Eddy; Demand, Marc; Beckx, Stephan; Vandeweyer, Tom; Delvaux, Christie; Leys, Frederik; Hikavyy, Andriy; Rooyackers, Rita; Kaiser, M.; Weemaes, R.G.R.; Biesemans, Serge; Jurczak, Gosia; Kottantharayil, Anil; Witters, Liesbeth; Lander, Rob (2007) -
Integration challenges for multi-gate devices
Collaert, Nadine; Brus, Stephan; De Keersgieter, An; Dixit, Abhisek; Ferain, Isabelle; Goodwin, Michael; Kottantharayil, Anil; Rooyackers, Rita; Verheyen, Peter; Yim, Yong Sik; Zimmerman, Paul; Beckx, Stephan; Degroote, Bart; Demand, Marc; Kim, Myeong-Cheol; Kunnen, Eddy; Locorotondo, Sabrina; Mannaert, Geert; Neuilly, Francois; Shamiryan, Denis; Baerts, Christina; Ercken, Monique; Laidler, David; Leys, Frederik; Loo, Roger; Lisoni, Judit; Snow, Jim; Vos, Rita; Boullart, Werner; Pollentier, Ivan; De Gendt, Stefan; De Meyer, Kristin; Jurczak, Gosia; Biesemans, Serge (2005) -
Integration of tall triple-gate devices with inserted TaxNy gate in a 0.274μm² 6T-SRAM cell and advanced CMOS logic circuits
Witters, Liesbeth; Collaert, Nadine; Nackaerts, Axel; Demand, Marc; Demuynck, Steven; Delvaux, Christie; Lauwers, Anne; Baerts, Christina; Beckx, Stephan; Boullart, Werner; Brus, Stephan; Degroote, Bart; de Marneffe, Jean-Francois; Dixit, Abhisek; De Meyer, Kristin; Ercken, Monique; Goodwin, Michael; Hendrickx, Eric; Heylen, Nancy; Jaenen, Patrick; Laidler, David; Leray, Philippe; Locorotondo, Sabrina; Maenhoudt, Mireille; Moelants, Myriam; Pollentier, Ivan; Ronse, Kurt; Rooyackers, Rita; Van Aelst, Joke; Vandenberghe, Geert; Vandeweyer, Tom; Vanhaelemeersch, Serge; Van Hove, Marleen; Van Olmen, Jan; Verhaegen, Staf; Versluijs, Janko; Vrancken, Christa; Wiaux, Vincent; Willems, Patrick; Wouters, Johan M. D.; Jurczak, Gosia; Biesemans, Serge (2005) -
Misoriented domains in 0001)-GaN/(111)-Ge grown by molecular beam epitaxy
Zhang, Y.; McAleese, C.; Xiu, H.; Humphreys, C.; Lieten, Ruben; Degroote, Bart; Borghs, Gustaaf (2007) -
NMOS and PMOS triple gate devices with mid-gap metal gate on oxynitride and Hf based gate dielectrics
Henson, Kirklen; Collaert, Nadine; Demand, Marc; Goodwin, Michael; Brus, Stephan; Rooyackers, Rita; Van Ammel, Annemie; Degroote, Bart; Ercken, Monique; Baerts, Christina; Kottantharayil, Anil; Dixit, Abhisek; Beckx, Stephan; Schram, Tom; Deweerd, Wim; Boullart, Werner; Schaekers, Marc; De Gendt, Stefan; De Meyer, Kristin; Yim, Yong Sik; Hooker, Jacob; Jurczak, Gosia; Biesemans, Serge (2005) -
Optimization of low-temperature silicon nitride processes for improvement of device performance
Sleeckx, Erik; Schaekers, Marc; Shi, Xiaoping; Kunnen, Eddy; Degroote, Bart; Jurczak, Gosia; de Potter de ten Broeck, Muriel; Augendre, Emmanuel (2005) -
Optimization of low-tempurature silicon nitride processes for improvement of device performance
Sleeckx, Erik; Schaekers, Marc; Shi, Xiaoping; Kunnen, Eddy; Degroote, Bart; Jurczak, Gosia; de Potter de ten Broeck, Muriel; Augendre, Emmanuel (2004) -
Plasma etching of deep trenches in Si
Degroote, Bart (2004) -
Solid phase epitaxy versus random nucleation and growth in sub-20 nm wide fin field-effect transistors
Duffy, Ray; Van Dal, Mark; Pawlak, Bartek; Kaiser, M.; Weemaes, R.G.R.; Degroote, Bart; Kunnen, Eddy; Altamirano Sanchez, Efrain (2007) -
Spacer defined FinFET: Active area patterning of sub-20 nm fins with high density
Degroote, Bart; Rooyackers, Rita; Vandeweyer, Tom; Collaert, Nadine; Boullart, Werner; Kunnen, Eddy; Shamiryan, Denis; Wouters, J.; Van Puymbroeck, Jan; Dixit, Abhisek; Jurczak, Gosia (2007) -
The etchback approach: enlarged process window for MuGFET gate etching
Degroote, Bart; Collaert, Nadine; Rooyackers, Rita; Baklanov, Mikhaïl; Boullart, Werner; Kunnen, Eddy; Jurczak, Gosia; Vanhaelemeersch, Serge (2005)