Browsing by author "Bury, Erik"
Now showing items 1-20 of 79
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A brief overview of gate oxide defect properties and their relation to MOSFET instabilities and device and circuit time-dependent variability
Kaczer, Ben; Franco, Jacopo; Weckx, Pieter; Roussel, Philippe; Putcha, Vamsi; Bury, Erik; Simicic, Marko; Vaisman Chasin, Adrian; Linten, Dimitri; Parvais, Bertrand; Catthoor, Francky; Rzepa, Gerhard; Waltl, Michael; Grasser, Tibor (2018) -
A BSIM-Based Predictive Hot-Carrier Aging Compact Model
Xiang, Yang; Tyaginov, Stanislav; Vandemaele, Michiel; Wu, Zhicheng; Franco, Jacopo; Bury, Erik; Truijen, Brecht; Parvais, Bertrand; Linten, Dimitri; Kaczer, Ben (2021) -
A Comprehensive Cryogenic CMOS Variability and Reliability Assessment using Transistor Arrays
Grill, Alexander; Michl, J.; Diaz Fortuny, Javier; Beckers, Arnout; Bury, Erik; Vaisman Chasin, Adrian; Grasser, T.; Waltl, M.; Kaczer, Ben; De Greve, Kristiaan (2023) -
A multi-bits/cell PUF using analog breakdown positions in CMOS
Chuang, Kent; Bury, Erik; Degraeve, Robin; Kaczer, Ben; Kallstenius, Thomas; Groeseneken, Guido; Linten, Dimitri; Verbauwhede, Ingrid (2018) -
A physically unclonable function featuring 0% BER using soft oxide breakdown positions in 40nm CMOS
Chuang, Kent; Bury, Erik; Degraeve, Robin; Kaczer, Ben; Linten, Dimitri; Verbauwhede, Ingrid (2018) -
A physically unclonable function using soft oxide breakdown featuring 0% native BER and 51.8fJ/bit in 40nm CMOS
Chuang, Kent; Bury, Erik; Degraeve, Robin; Kaczer, Ben; Linten, Dimitri; Verbauwhede, Ingrid (2019) -
A Ring-Oscillator-Based Degradation Monitor Concept with Tamper Detection Capability
Diaz Fortuny, Javier; Saraza Canflanca, Pablo; Bury, Erik; Vandemaele, Michiel; Kaczer, Ben; Degraeve, Robin (2022) -
An In-Depth Study of Ring Oscillator Reliability under Accelerated Degradation and Annealing to Unveil Integrated Circuit Usage
Diaz Fortuny, Javier; Saraza Canflanca, Pablo; Bury, Erik; Degraeve, Robin; Kaczer, Ben (2024) -
Array-based statistical characterization of CMOS degradation modes and modeling of the time-dependent variability induced by different stress patterns in the {VG,VD} bias space
Bury, Erik; Vaisman Chasin, Adrian; Chuang, Kent; Vandemaele, Michiel; Van Beek, Simon; Franco, Jacopo; Kaczer, Ben; Linten, Dimitri (2019) -
Assessment of Transistor Aging Models in a 28nm CMOS Technology at a Wide Range of Stress Conditions
Sangani, Dishant; Diaz Fortuny, Javier; Bury, Erik; Kaczer, Ben; Gielen, G. (2022) -
Benchmarking time-dependent variability of junctionless nanowire FETs
Kaczer, Ben; Rzepa, G.; Franco, Jacopo; Weckx, Pieter; Vaisman Chasin, Adrian; Putcha, Vamsi; Bury, Erik; Simicic, Marko; Roussel, Philippe; Hellings, Geert; Veloso, Anabela; Matagne, Philippe; Grasser, T.; Linten, Dimitri (2017) -
Beyond interface: the impact of oxide border traps on InGaAs and Ge n-MOSFETs
Lin, Dennis; Alian, AliReza; Gupta, S.; Yang, B.; Bury, Erik; Sioncke, Sonja; Degraeve, Robin; Toledano Luque, Maria; Krom, Raymond; Favia, Paola; Bender, Hugo; Caymax, Matty; Saraswat, K.C.; Collaert, Nadine; Thean, Aaron (2012) -
Channel hot carrier degradation and self-heating effects in FinFETs
Cho, Moon Ju; Bury, Erik; Kaczer, Ben; Groeseneken, Guido (2014) -
Characterization and modeling of hot carrier degradation in N-channel gate-all-around nanowire FETs
Gupta, Charu; Gupta, Anshul; Tuli, Shikhar; Bury, Erik; Parvais, Bertrand; Dixit, Abhisek (2020) -
Characterization of self-heating in high-mobility Ge FinFET pMOS devices
Bury, Erik; Kaczer, Ben; Mitard, Jerome; Collaert, Nadine; Khatami, N.S.; Aksamija, Zlatan; Vasileska, Dragica; Raleva, Katerina; Witters, Liesbeth; Hellings, Geert; Linten, Dimitri; Groeseneken, Guido; Thean, Aaron (2015) -
Characterization of time-dependent variability using 32k transistor arrays in advanced HK/MG technology
Weckx, Pieter; Kaczer, Ben; Chen, Chris; Franco, Jacopo; Bury, Erik; Chanda, Kaushik; Watt, J.; Roussel, Philippe; Catthoor, Francky; Groeseneken, Guido (2015) -
Compact Physics Hot-Carrier Degradation Model Valid over a Wide Bias Range
Tyaginov, Stanislav; Bury, Erik; Grill, Alexander; Yu, Zhuoqing; Makarov, Alexander; De Keersgieter, An; Vexler, Mikhail; Vandemaele, Michiel; Wang, Runsheng; Spessot, Alessio; Vaisman Chasin, Adrian; Kaczer, Ben (2023) -
Comparison of Electrical Performance of Co-Integrated Forksheets and Nanosheets Transistors for the 2nm Technological Node and Beyond
Ritzenthaler, Romain; Mertens, Hans; Eneman, Geert; Simoen, Eddy; Bury, Erik; Eyben, Pierre; Bufler, Fabian; Oniki, Yusuke; Briggs, Basoene; Chan, BT; Hikavyy, Andriy; Mannaert, Geert; Parvais, Bertrand; Vaisman Chasin, Adrian; Mitard, Jerome; Dentoni Litta, Eugenio; Samavedam, Sri; Horiguchi, Naoto (2021) -
Complete degradation mapping of stacked gate-all-around Si nanowire transistors considering both intrinsic and extrinsic effects
Vaisman Chasin, Adrian; Bury, Erik; Kaczer, Ben; Franco, Jacopo; Roussel, Philippe; Ritzenthaler, Romain; Mertens, Hans; Horiguchi, Naoto; Linten, Dimitri; Mocuta, Anda (2017)