Browsing by author "Rooyackers, Rita"
Now showing items 41-60 of 277
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Challenges in patterning 45nm node multiple-gate devices and SRAM cells
Ercken, Monique; Delvaux, Christie; Baerts, Christina; Locorotondo, Sabrina; Degroote, Bart; Wiaux, Vincent; Nackaerts, Axel; Rooyackers, Rita; Verhaegen, Staf; Pollentier, Ivan (2004) -
Challenges in scaling of CMOS devices towards 65nm node
Jurczak, Gosia; Veloso, Anabela; Rooyackers, Rita; Augendre, Emmanuel; Mertens, Sofie; Rothschild, Aude; Schaekers, Marc; Lindsay, Richard; Lauwers, Anne; Henson, Kirklen; Severi, Simone; Pollentier, Ivan; De Keersgieter, An (2003-06) -
Characteristics and integration challenges of FinFET-based devices for (Sub-)22nm technology nodes circuit applications
Veloso, Anabela; Van Dal, Mark; Collaert, Nadine; De Keersgieter, An; Witters, Liesbeth; Rooyackers, Rita; Redolfi, Augusto; Brus, Stephan; Duffy, Ray; Pawlak, Bartek; Vellianitis, Georgios; Duriez, Blandine; Merelle, Thomas; Absil, Philippe; Biesemans, Serge; Jurczak, Gosia; Hoffmann, Thomas Y.; Lander, Rob (2009-10) -
Characteristics of Selective Epitaxial SiGe and Si Deposition processes for recessed source/drain applications
Loo, Roger; Verheyen, Peter; Eneman, Geert; Rooyackers, Rita; Leys, Frederik; Shamiryan, Denis; De Meyer, Kristin; Absil, Philippe; Caymax, Matty (2005) -
Characteristics of selective epitaxial SiGe deposition processes for recesssed source/drain applications
Loo, Roger; Verheyen, Peter; Eneman, Geert; Rooyackers, Rita; Leys, Frederik; Shamiryan, Denis; De Meyer, Kristin; Absil, Philippe; Caymax, Matty (2005) -
Characterization and optimization of sub-32nm FinFET devices for ESD applications
Thijs, Steven; Tremouilles, David; Russ, Christian; Griffoni, Alessio; Collaert, Nadine; Rooyackers, Rita; Linten, Dimitri; Scholz, Mirko; Duvvury, Charvaka; Gossner, Harald; Jurczak, Gosia; Groeseneken, Guido (2008) -
CMOS-compatible dielectric constant engineering by embedding metallic particles in aluminum oxide
Put, Brecht; Adelmann, Christoph; Swerts, Johan; Rooyackers, Rita; Tielens, Hilde; Van Elshocht, Sven; Heyns, Marc; Radu, Iuliana (2013) -
CMP-less integration of fully Ni-silicided metal gates in FinFETs by simultaneous silicidation of the source, drain, and the gate using a novel dual hard mask approach
Kottantharayil, Anil; Verheyen, Peter; Collaert, Nadine; Dixit, Abhisek; Kaczer, Ben; Snow, Jim; Vos, Rita; Locorotondo, Sabrina; Degroote, Bart; Shi, Xiaoping; Rooyackers, Rita; Mannaert, Geert; Brus, Stephan; Yim, Yong Sik; Lauwers, Anne; Goodwin, Michael; Kittl, Jorge; Van Dal, Mark; Richard, Olivier; Veloso, Anabela; Kubicek, Stefan; Beckx, Stephan; Boullart, Werner; De Meyer, Kristin; Absil, Philippe; Jurczak, Gosia; Biesemans, Serge (2005) -
Comparative study of vertical GAA TFETs and GAA MOSFETs in function of the inversion coefficient
Martino, Joao; Sivieri, Victor; Agopian, Paula; Rooyackers, Rita; Vandooren, Anne; Simoen, Eddy; Thean, Aaron; Claeys, Cor (2016) -
Comparison between analog performance of standard and strained triple-gate nFinFETs
Pavanello, M. A.; Martino, J. A.; Simoen, Eddy; Rooyackers, Rita; Collaert, Nadine; Claeys, Cor (2008) -
Comparison between vertical silicon NW-TFET and NW-MOSFET from analog point of view
Agopian, P.G.D.; Martino, J.A.; Vandooren, Anne; Rooyackers, Rita; Simoen, Eddy; Thean, Aaron; Claeys, Cor (2015) -
Comparison of current mirrors designed with TFET and FinFET devices for different dimensions and temperatures
Martino, M.D.V.; Martino, J.A.; Agopian, P.G.D.; Vandooren, Anne; Rooyackers, Rita; Simoen, Eddy; Thean, Aaron; Claeys, Cor (2015) -
Comparison of scaled floating body RAM architectures
Collaert, Nadine; Rosmeulen, Maarten; Rakowski, Michal; Rooyackers, Rita; Witters, Liesbeth; Veloso, Anabela; Van Houdt, Jan; Jurczak, Gosia (2008) -
Compressively strained SiGe band-to-band tunneling model calibration based on p-i-n diodes and prospects of strained SiGe tunneling field-effect transistors
Kao, Frank; Verhulst, Anne; Rooyackers, Rita; Douhard, Bastien; Delmotte, Joris; Bender, Hugo; Richard, Olivier; Vandervorst, Wilfried; Simoen, Eddy; Hikavyy, Andriy; Loo, Roger; Arstila, Kai; Collaert, Nadine; Thean, Aaron; Heyns, Marc; De Meyer, Kristin (2014) -
Contact resistivity and Fermi-level pinning in n-type Ge contacts with epitaxial Si-passivation
Martens, Koen; Rooyackers, Rita; Firrincieli, Andrea; Vincent, Benjamin; Loo, Roger; De Jaeger, Brice; Meuris, Marc; Favia, Paola; Bender, Hugo; Douhard, Bastien; Vandervorst, Wilfried; Simoen, Eddy; Jurczak, Gosia; Wouters, Dirk; Kittl, Jorge (2011) -
Controlling STI-related parasitic conduction in 90nm CMOS and below
Augendre, Emmanuel; Rooyackers, Rita; Shamiryan, Denis; Ravit, Claire; Jurczak, Gosia; Badenes, Gonçal (2002) -
Correlation between surface reconstruction and polytypism in InAs nanowire selective area epitaxy
Liu, Ziyang; Merckling, Clement; Rooyackers, Rita; Richard, Olivier; Bender, Hugo; Mols, Yves; Vila, Maria; Juan, Rubio-Zuazo; German, Castro; Collaert, Nadine; Thean, Aaron; Vandervorst, Wilfried; Heyns, Marc (2017) -
Demonstration of recessed SiGe S/D and inserted metal gate on HfO2 for high performance pFETs
Verheyen, Peter; Eneman, Geert; Rooyackers, Rita; Loo, Roger; Eeckhout, Lieve; Rondas, Dirk; Leys, Frederik; Snow, Jim; Shamiryan, Denis; Demand, Marc; Hoffmann, Thomas Y.; Goodwin, Michael; Fujimoto, Hiromasa; Ravit, Claire; Lee, Byeong Chan; Caymax, Matty; De Meyer, Kristin; Absil, Philippe; Jurczak, Gosia; Biesemans, Serge (2005-12) -
Design methodology for FinFET GG-NMOS ESD protecction devices
Thijs, Steven; Russ, Christian; Tremouilles, David; Linten, Dimitri; Scholz, Mirko; Jurczak, Gosia; Collaert, Nadine; Rooyackers, Rita; Duvvury, Charvaka; Gossner, Harald; Groeseneken, Guido (2008-05) -
Design methodology of FinFET devices that meet IC-level HBM ESD targets
Thijs, Steven; Russ, Christian; Tremouilles, David; Linten, Dimitri; Scholz, Mirko; Jurczak, Gosia; Collaert, Nadine; Rooyackers, Rita; Sawada, M; Nakaei, T; Hasebe, T; Duvvury, Charvaka; Gossner, Harald; Groeseneken, Guido (2008-09)