Browsing Conference contributions by imec author "588f3e4029b46978348279bdc8cc25d62ceba1e7"

Now showing items 1-20 of 41

    • 1/f noise in fully integrated electrolytically gated FinFETs with fin width down to 20nm 

      Martens, Koen; Du Bois, Bert; Van Roy, Wim; Severi, Simone; Siew, Yong Kong; Gupta, Anshul; Dupuy, Emmanuel; Radisic, Dunja; Altamirano Sanchez, Efrain; Simoen, Eddy (2019)

    • 3D sequential low temperature top tier devices using dopant activation with excimer laser anneal and strained silicon as performance boosters 

      Vandooren, Anne; Wu, Zhicheng; Parihar, Narendra; Franco, Jacopo; Parvais, Bertrand; Matagne, Philippe; Debruyn, Haroen; Mannaert, Geert; Devriendt, Katia; Teugels, Lieve; Vecchio, Emma; Radisic, Dunja; Rosseel, Erik; Hikavyy, Andriy; Chan, BT; Waldron, Niamh; Mitard, Jerome; Besnard, G.; Alvarez, A.; Gaudin, G.; Schwarzenbach, W.; Radu, I.; Nguyen, B. Y.; Huet, K.; Tabata, T.; Mazzamuto, F.; Demuynck, Steven; Boemmels, Juergen; Collaert, Nadine; Horiguchi, Naoto (2020)

    • A 400GHz fMAX fully self-aligned SiGe:C HBT architecture 

      Van Huylenbroeck, Stefaan; Sibaja-Hernandez, Arturo; Venegas, Rafael; You, Shuzhen; Winderickx, Gillis; Radisic, Dunja; Lee, Willie; Ong, Patrick; Vandeweyer, Tom; Nguyen, Duy; De Meyer, Kristin; Decoutere, Stefaan (2009-10)

    • Advanced a-VMCO resistive switching memory through inner interface engineering with wide (>10²) on/off window, tunable μA-range switching current and excellent variability 

      Govoreanu, Bogdan; Di Piazza, Luca; Ma, Jigang; Conard, Thierry; Vanleenhove, Anja; Belmonte, Attilio; Radisic, Dunja; Popovici, Mihaela Ioana; Velea, Alin; Redolfi, Augusto; Richard, Olivier; Clima, Sergiu; Adelmann, Christoph; Bender, Hugo; Jurczak, Gosia (2016)

    • Buried metal line compatible with 3D sequential integration for top tier planar devices dynamic Vth tuning and RF shielding applications 

      Vandooren, Anne; Wu, Zhicheng; Khaled, Ahmad; Franco, Jacopo; Parvais, Bertrand; Li, W.; Witters, Liesbeth; Walke, Amey; Peng, Lan; Rassoul, Nouredine; Matagne, Philippe; Jamieson, Geraldine; Inoue, Fumihiro; Nguyen, B.Y.; Debruyn, Haroen; Devriendt, Katia; Teugels, Lieve; Heylen, Nancy; Vecchio, Emma; Zheng, T.; Radisic, Dunja; Rosseel, Erik; Vanherle, Wendy; Hikavyy, Andriy; Chan, BT; Besnard, G.; Schwarzenbach, W.; Gaudin, G.; Radu, Iuliana; Waldron, Niamh; De Heyn, Vincent; Demuynck, Steven; Boemmels, Juergen; Ryckaert, Julien; Collaert, Nadine; Mocuta, Dan (2019)

    • Buried Power Rail Integration for CMOS Scaling beyond the 3 nm Node 

      Gupta, Anshul; Tao, Zheng; Radisic, Dunja; Mertens, Hans; Varela Pedreira, Olalla; Demuynck, Steven; Boemmels, Juergen; Devriendt, Katia; Heylen, Nancy; Wang, Shouhua; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Peter, Antony; Rassoul, Nouredine; Siew, Yong Kong; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; Capogreco, Elena; Mannaert, Geert; Sepulveda Marquez, Alfonso; Dupuy, Emmanuel; Vandersmissen, Kevin; Chehab, Bilal; Murdoch, Gayle; Altamirano Sanchez, Efrain; Biesemans, Serge; Tokei, Zsolt; Dentoni Litta, Eugenio; Horiguchi, Naoto (2022)

    • Buried Power Rail Integration with Si FinFETs for CMOS Scaling beyond the 5 nm Node 

      Gupta, Anshul; Mertens, Hans; Tao, Zheng; Demuynck, Steven; Boemmels, Juergen; Arutchelvan, Goutham; Devriendt, Katia; Varela Pedreira, Olalla; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Zahedmanesh, Houman; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, N.; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Yakimets, Dmitry; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Cousserier, Joris; Jaysankar, Manoj; Lazzarino, Frederic; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Tokei, Zsolt; Horiguchi, Naoto (2020)

    • Buried Power Rail Metal exploration towards the 1 nm Node 

      Gupta, Anshul; Radisic, Dunja; Maes, J.W.; Varela Pedreira, Olalla; Soulie, Jean-Philippe; Jourdan, Nicolas; Mertens, Hans; Bandyopadhyay, Sudip; Le, Quoc Toan; Pacco, Antoine; Heylen, Nancy; Vandersmissen, Kevin; Devriendt, Katia; Zhu, C.; Datta, S.; Sebaai, Farid; Wang, S.; Mousa, M.; Lee, J.; Geypen, Jef; De Wachter, Bart; Chehab, Bilal; Salahuddin, Shairfe Muhammad; Murdoch, Gayle; Biesemans, Serge; Tokei, Zsolt; Dentoni Litta, Eugenio; Horiguchi, Naoto (2021)

    • Buried Power Rail Scaling and Metal Assessment for the 3 nm Node and Beyond 

      Gupta, Anshul; Varela Pedreira, Olalla; Tao, Zheng; Mertens, Hans; Radisic, Dunja; Jourdan, Nicolas; Devriendt, Katia; Heylen, Nancy; Wang, Shouhua; Chehab, Bilal; Jang, Doyoung; Hellings, Geert; Sebaai, Farid; Lorant, Christophe; Teugels, Lieve; Peter, Antony; Chan, BT; Schleicher, Filip; Demonie, Ingrid; Marien, Philippe; Sepulveda Marquez, Alfonso; Richard, Olivier; Nagesh, Nishanth; Lesniewska, Alicja; Lazzarino, Frederic; Ryckaert, Julien; Morin, Pierre; Altamirano Sanchez, Efrain; Murdoch, Gayle; Boemmels, Juergen; Demuynck, Steven; Na, Myung Hee; Tokei, Zsolt; Biesemans, Serge; Dentoni Litta, Eugenio; Horiguchi, Naoto (2020)

    • Copper plating for 3D interconnects 

      Radisic, Alex; Luhn, Ole; Vaes, Jan; Armini, Silvia; El-Mekki, Zaid; Radisic, Dunja; Ruythooren, Wouter; Vereecken, Philippe (2009)

    • Copper plating for 3d interconnects 

      Radisic, Alex; Luhn, Ole; Vaes, Jan; Armini, Silvia; El-Mekki, Zaid; Radisic, Dunja; Ruythooren, Wouter; Vereecken, Philippe (2010)

    • Defect-free isolation on high-thermal-conductivity SOI substrates for complementary BiCMOS technology 

      Van Wichelen, Koen; Ong, Patrick; Moussa, Alain; Radisic, Dunja; Devriendt, Katia; Halder, Sandip; Kenis, Karine; Lee, Willie; Vandevelde, Bart; Soonekindt, Christophe; Shahar, Abdul Hadi; Smet, Tom; Van Huylenbroeck, Stefaan; Decoutere, Stefaan; Seacrist, Mike; Ries, Mike; Drobny, Vladimir; Wise, Rick (2009)

    • Enabling Logic with Backside Connectivity via n-TSVs and its Potential as a Scaling Booster 

      Veloso, Anabela; Jourdain, Anne; Hiblot, Gaspard; Schleicher, Filip; D'have, Koen; Sebaai, Farid; Radisic, Dunja; Loo, Roger; Hopf, Toby; De Keersgieter, An; Arimura, Hiroaki; Eneman, Geert; Favia, Paola; Geypen, Jef; Arutchelvan, Goutham; Vaisman Chasin, Adrian; Jang, Doyoung; Nyns, Laura; Rosseel, Erik; Hikavyy, Andriy; Mannaert, Geert; Chan, BT; Devriendt, Katia; Demuynck, Steven; Van der Plas, Geert; Ryckaert, Julien; Beyer, Gerald; Dentoni Litta, Eugenio; Beyne, Eric; Horiguchi, Naoto (2021)

    • Etching of Co-Pd with significantly reduced sidewall re-deposition 

      Radisic, Dunja; Nishimura, Eiichi; Kushibiki, Masato; Wataru, Shimizu; Tahara, Shigeru; Xu, Kaidong; Kim, Woosik; Boullart, Werner (2013)

    • FinFETs with Thermally Stable RMG Gate Stack for Future DRAM Peripheral Circuits 

      Capogreco, Elena; Arimura, Hiroaki; Ritzenthaler, Romain; Brus, Stephan; Oniki, Yusuke; Dupuy, Emmanuel; Sebaai, Farid; Radisic, Dunja; Chan, BT; Zhou, Daisy; Machkaoutsan, V.; Yoon, S.; Itokawa, H.; Yamaguchi, M.; Gao, Z.; Fazan, P.; Chen, Y.; Subramanian, Sujith; Ragnarsson, Lars-Ake; Spessot, Alessio; Dentoni Litta, Eugenio (2022)

    • First Monolithic Integration of 3D Complementary FET (CFET) on 300mm Wafers 

      Subramanian, Sujith; Hosseini, Maryam; Chiarella, Thomas; Sarkar, Satadru; Schuddinck, Pieter; Chan, BT; Radisic, Dunja; Mannaert, Geert; Hikavyy, Andriy; Rosseel, Erik; Sebaai, Farid; Peter, Antony; Hopf, Toby; Morin, Pierre; Wang, Shouhua; Devriendt, Katia; Batuk, Dmitry; Martinez Alanis, Gerardo Tadeo; Veloso, Anabela; Dentoni Litta, Eugenio; Baudot, Sylvain; Siew, Yong Kong; Zhou, X.; Briggs, Basoene; Capogreco, Elena; Hung, Joey; Koret, R.; Spessot, Alessio; Ryckaert, Julien; Demuynck, Steven; Horiguchi, Naoto; Boemmels, Juergen (2020)

    • Forksheet FETs with Bottom Dielectric Isolation, Self-Aligned Gate Cut, and Isolation between Adjacent Source-Drain Structures 

      Mertens, Hans; Ritzenthaler, Romain; Oniki, Yusuke; Puttarame Gowda, Pallavi; Mannaert, Geert; Sebaai, Farid; Hikavyy, Andriy; Rosseel, Erik; Dupuy, Emmanuel; Peter, Antony; Vandersmissen, Kevin; Radisic, Dunja; Briggs, Basoene; Batuk, Dmitry; Geypen, Jef; Martinez Alanis, Gerardo Tadeo; Seidel, Felix; Richard, Olivier; Chan, BT; Mitard, Jerome; Dentoni Litta, Eugenio; Horiguchi, Naoto (2022)

    • High yield and process uniformity for 300 mm integrated WS2 FETs 

      Schram, Tom; Smets, Quentin; Radisic, Dunja; Groven, Benjamin; Thiam, Arame; Li, Waikin; Dupuy, Emmanuel; Vandersmissen, Kevin; Maurice, Thibaut; Asselberghs, Inge; Radu, Iuliana (2021)

    • High-throughput magnetic metrology for spintronic CMOS integration 

      Yan, Jingdong; Manfrini, Mauricio; Radisic, Dunja; Ciubotaru, Florin; Wilson, Chris; Radu, Iuliana; Thean, Aaron (2016)

    • In-line control of Si loss after post ion implantation strip 

      Shamiryan, Denis; Radisic, Dunja; Boullart, Werner (2009)