Scaling Cu/SiCN Wafer-to-Wafer Hybrid Bonding down to 400 nm interconnect pitch

Abstract

This study presents groundbreaking outcomes of 400nm pitch wafer-to-wafer (W2W) hybrid bonding connections with a Cu/SiCN bonding interface. A new test vehicle is introduced and meticulously designed for the relevant process development and studies. To ensure a precise surface topography control after CMP, a hexagonal pad grid is adopted, with dummy pads strategically placed in the unused layout areas. The design contains a large range of pad pitches from 1000nm to 400nm, accommodating both equal and unequal pad size configurations. Improved underlayer topography control emerges as a significant factor in achieving void-free bonding. Furthermore, the measured electrical data demonstrates close alignment with simulated models, encompassing resistance and capacitance. The impact of local pad-to-pad overlay error on the electrical properties of hybrid bond pads are also explored in this paper. The findings confirm the necessity for a maximum vector overlay tolerance of 100nm for 400nm pitch connections.