Browsing by author "Stucchi, Michele"

3-D technology assessment: path-finding the technology/design sweet-spot

Marchal, Pol; Bougard, Bruno; Katti, Guruprasad; Stucchi, Michele; Dehaene, Wim; Papanikolaou, Antonis; Verkest, Diederik; Swinnen, Bart; Beyne, Eric (2009)

3D IC interconnects: microbump yield electrical characterization and TSV modeling

Vakoula, Panagiota; Tyrovouzi, Anna-Maria; Velenis, Dimitrios; Stucchi, Michele; Croes, Kristof (2014)

3D Integration: Circuit design, test and reliability challenges

Minas, Nikolaos; De Wolf, Ingrid; Marinissen, Erik Jan; Stucchi, Michele; Oprins, Herman; Mercha, Abdelkarim; Van der Plas, Geert; Velenis, Dimitrios; Marchal, Pol (2010)

3D stacked IC demonstration using a through silicon via first approach

Van Olmen, Jan; Mercha, Abdelkarim; Katti, Guruprasad; Huyghebaert, Cedric; Van Aelst, Joke; Seppala, Emma; Zhao, Chao; Armini, Silvia; Vaes, Jan; Cotrin Teixeira, Ricardo; Van Cauwenberghe, Marc; Verdonck, Patrick; Verhemeldonck, Koen; Jourdain, Anne; Ruythooren, Wouter; de Potter de ten Broeck, Muriel; Opdebeeck, Ann; Chiarella, Thomas; Parvais, Bertrand; Debusschere, Ingrid; Hoffmann, Thomas Y.; De Wachter, Bart; Dehaene, Wim; Stucchi, Michele; Rakowski, Michal; Soussan, Philippe; Cartuyvels, Rudi; Beyne, Eric; Biesemans, Serge; Swinnen, Bart (2008)

3D stacked IC demonstrator using hybrid collective die-to-wafer bonding with copper through silicon vias (TSV)

Van Olmen, Jan; Coenen, Jens; Dehaene, Wim; De Meyer, Kristin; Huyghebaert, Cedric; Jourdain, Anne; Katti, Guruprasad; Mercha, Abdelkarim; Rakowski, Michal; Stucchi, Michele; Travaly, Youssef; Beyne, Eric; Swinnen, Bart (2009)

3D stacked ICs using Cu TSVs and die to wafer hybrid collective bonding

Katti, Guruprasad; Mercha, Abdelkarim; Van Olmen, Jan; Huyghebaert, Cedric; Jourdain, Anne; Stucchi, Michele; Rakowski, Michal; Debusschere, Ingrid; Soussan, Philippe; Dehaene, Wim; De Meyer, Kristin; Travaly, Youssef; Beyne, Eric; Biesemans, Serge; Swinnen, Bart (2009)

3D technology roadmap and status

Marchal, Pol; Van der Plas, Geert; Eneman, Geert; Moroz, V.; Badaroglu, Mustafa; Mercha, Abdelkarim; Thijs, Steven; Linten, Dimitri; Katti, Guruprasad; Stucchi, Michele; Vandevelde, Bart; Oprins, Herman; Cherman, Vladimir; Croes, Kris; Redolfi, Augusto; La Manna, Antonio; Travaly, Youssef; Beyne, Eric; Cartuyvels, Rudi (2011)

3D-optimized SRAM Macro Design and Application to Memory-on-Logic 3D-IC at Advanced Nodes

Chen, Rongmei; Weckx, Pieter; Salahuddin, Shairfe Muhammad; Kim, Soon-Wook; Sisto, Giuliano; Van der Plas, Geert; Stucchi, Michele; Baert, Rogier; Debacker, Peter; Na, Myung Hee; Ryckaert, Julien; Milojevic, Dragomir; Beyne, Eric (2020)

A comprehensive LER-aware TDDB lifetime model for advanced Cu interconnects

Stucchi, Michele; Roussel, Philippe; Tokei, Zsolt; Demuynck, Steven; Groeseneken, Guido (2011)

A highly reliable 1.4μm pitch via-last TSV module for wafer-to-wafer hybrid bonded 3D-SOC systems

Van Huylenbroeck, Stefaan; De Vos, Joeri; El-Mekki, Zaid; Jamieson, Geraldine; Tutunjyan, Nina; Muga, Karthik; Stucchi, Michele; Miller, Andy; Beyer, Gerald; Beyne, Eric (2019)

A tool flow for predicting system level timing failures due to interconnect reliability degradation

Guo, Jin; Papanikolaou, Antonis; Stucchi, Michele; Croes, Kristof; Tokei, Zsolt; Catthoor, Francky (2008)

A yield-aware modeling methodology for nano-scaled SRAM designs

Grossar, Evelyn; Croon, Jeroen; Stucchi, Michele; Dehaene, Wim; Maex, Karen (2005)

Accurate Measurements of Small Resistances in Vertical Interconnects with Small Aspect Ratios

Stucchi, Michele; Fodor, Ferenc; Marinissen, Erik Jan (2020)

Admittance matrix calculations of on-chip interconnects on lossy silicon substrate using multilayer Green's function

Ymeri, Hasan; Nauwelaers, Bart; Maex, Karen; De Roest, David; Vandenberghe, S.; Stucchi, Michele (2001)

Advanced solutions for copper and low k technology

Beyer, Gerald; Baklanov, Mikhaïl; Brongersma, Sywert; De Roest, David; Donaton, R.; Grillaert, Joost; Lanckmans, Filip; Maenhoudt, Mireille; Maex, Karen; Richard, Emmanuel; Struyf, Herbert; Stucchi, Michele; Tokei, Zsolt; Van Hove, Marleen; Vervoort, Iwan (2000)

Anomalous C-V inversion in TSV's: The problem and its cure

Stucchi, Michele; De Vos, Joeri; Jourdain, Anne; Li, Yunlong; Van der Plas, Geert; Croes, Kristof; Beyne, Eric (2018)

Benchmarking on-chip optical against electrical interconnect for high-performance applications

Stucchi, Michele; Cosemans, Stefan; Van Campenhout, Joris; Tokei, Zsolt; Beyer, Gerald (2011)

Buried Power Rails and Nano-Scale TSV: Technology Boosters for Backside Power Delivery Network and 3D Heterogeneous Integration

Jourdain, Anne; Stucchi, Michele; Van Der Plas, Geert; Beyer, Gerald; Beyne, Eric (2022)

CAD-oriented analytic formulas for self and mutual capacitance of interconnects on an Si-SiO2 substrate

Ymeri, Hasan; Nauwelaers, Bart; Maex, Karen; Vandenberghe, S.; De Roest, David; Stucchi, Michele (2001)

Capacitance measurements of 2-dimensional and 3-dimensional IC interconnect structures by quasi-static C-V technique

Stucchi, Michele; Velenis, Dimitrios; Katti, Guruprasad (2012)