Browsing by author "Stucchi, Michele"
Now showing items 21-40 of 139
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Capacitance reduction technique for through silicon via (TSV) in p-Si substrate
Katti, Guruprasad; Stucchi, Michele; De Meyer, Kristin; Dehaene, Wim (2010) -
Characterisation and integration feasibility of JSR's low-k dielectric LKD-5109
Das, Arabinda; Kokubo, Terukazu; Furukawa, Yukiko; Struyf, Herbert; Vos, Ingrid; Sijmus, Bram; Iacopi, Francesca; Van Aelst, Joke; Le, Quoc Toan; Carbonell, Laure; Brongersma, Sywert; Maenhoudt, Mireille; Tokei, Zsolt; Vervoort, Iwan; Sleeckx, Erik; Stucchi, Michele; Schaekers, Marc; Boullart, Werner; Rosseel, Erik; Van Hove, Marleen; Vanhaelemeersch, Serge; Shiota, A.; Maex, Karen (2002) -
Characterisation of JSR's spin-on hardmask FF-02
Das, Arabinda; Le, Quoc Toan; Furukawa, Yukiko; Nguyen Hoang, Viet; Terzieva, Valentina; de Theije, Femke; Whelan, Caroline; Maenhoudt, Mireille; Struyf, Herbert; Tokei, Zsolt; Iacopi, Francesca; Stucchi, Michele; Carbonell, Laure; Vos, Ingrid; Bender, Hugo; Patz, M.; Beyer, Gerald; Van Hove, Marleen; Maex, Karen (2003) -
Characterization and integration in Cu damascene structures of AURORA, an inorganic low-k dielectric
Alves Donaton, Ricardo; Coenegrachts, Bart; Sleeckx, Erik; Schaekers, Marc; Sophie, Guus; Matsuki, N.; Baklanov, Mikhaïl; Struyf, Herbert; Lepage, Muriel; Vanhaelemeersch, Serge; Beyer, Gerald; Stucchi, Michele; De Roest, David; Maex, Karen (2001) -
Characterization and integration of a new Si-O-C film deposited by CVD
Alves Donaton, Ricardo; Struyf, Herbert; Lepage, Muriel; Coenegrachts, Bart; Stucchi, Michele; De Roest, David; Baklanov, Mikhaïl; Vanhaelemeersch, Serge; Maex, Karen; Gaillard, F.; Xia, L. Q.; Lim, T. H.; Gotuaco, M.; Yieh, E.; Van Autryve, Luc (2001) -
Characterization of porous structure in ultra-low-k dielectrics by depositing thin conductive cap layers
Iacopi, Francesca; Tokei, Zsolt; Stucchi, Michele; Brongersma, Sywert; Vanhaeren, Danielle; Maex, Karen (2003) -
Characterization of the thermal impact of Cu-Cu bonds achieved using TSVs on hot spot dissipation in 3D stacked ICs
Oprins, Herman; Cherman, Vladimir; Vandevelde, Bart; Torregiani, Cristina; Stucchi, Michele; Van der Plas, Geert; Marchal, Pol; Beyne, Eric (2011-05) -
CMOS 32nm technology node: business as usual for interconnect damascene patterning?
Beyer, Gerald; Ciofi, Ivan; Van Olmen, Jan; Carbonell, Laure; Versluijs, Janko; Wiaux, Vincent; Op de Beeck, Maaike; Maenhoudt, Mireille; Struyf, Herbert; Hendrickx, Dirk; de Marneffe, Jean-Francois; Vereecke, Guy; Claes, Martine; Bearda, Twan; Volders, Henny; Heylen, Nancy; Travaly, Youssef; Stucchi, Michele; Tokei, Zsolt; Cartuyvels, Rudi (2008-12) -
Comparative study of Ni-silicide and Co-silicide for sub 0.25 μm technologies
Lauwers, A.; Besser, Paul; Gutt, T.; Satta, Alessandra; de Potter de ten Broeck, Muriel; Lindsay, Richard; Roelandts, Nico; Loosen, Fred; Stucchi, Michele; Vrancken, Christa; Deweerdt, Bruno; Maex, Karen (1999) -
Comparative study of Ni-silicide and Co-silicide for sub 0.25-μm technologies
Lauwers, A.; Besser, Paul; Gutt, T.; Satta, Alessandra; de Potter de ten Broeck, Muriel; Lindsay, Richard; Roelandts, Nico; Loosen, Fred; Jin, S.; Bender, Hugo; Stucchi, Michele; Vrancken, Evi; Deweerdt, Bruno; Maex, Karen (2000) -
Continuity and reliability assessment of a scalable 3×50μm and 2×40μm Via-middle TSV module
Van Huylenbroeck, Stefaan; Li, Yunlong; Stucchi, Michele; Bogaerts, Lieve; De Vos, Joeri; Beyer, Gerald; Beyne, Eric; Brouri, Mohand; Nalla, Praveen; Gopinath, Sanjay; Thorum, Matthew; Richardson, Joe; Yu, Jengyi (2016) -
Critical issues in the integration of Copper and low-k dielectrics
Donaton, R. A.; Coenegrachts, Bart; Maex, Karen; Struyf, Herbert; Vanhaelemeersch, Serge; Beyer, Gerald; Richard, Emmanuel; Vervoort, Iwan; Fyen, Wim; Grillaert, Joost; van der Groen, Sonja; Stucchi, Michele; De Roest, David (1999) -
Cu/LKD-5109 damascene integration demonstration using FF-02 low-k spin-on hard-mask and embedded etch-stop
Kokubo, Terukazu; Das, Arabinda; Furukawa, Yukiko; Vos, Ingrid; Iacopi, Francesca; Struyf, Herbert; Van Aelst, Joke; Maenhoudt, Mireille; Tokei, Zsolt; Vervoort, Iwan; Bender, Hugo; Stucchi, Michele; Schaekers, Marc; Boullart, Werner; Van Hove, Marleen; Vanhaelemeersch, Serge; Peterson, William; Shiota, A.; Maex, Karen (2002) -
Defect localization in 3-D TSV structures by differential light-induced capacitance alteration
Jacobs, Kristof J.P.; Stucchi, Michele; Afanasiev, Valeri; Gonzalez, Mario; Croes, Kristof; De Wolf, Ingrid; Beyne, Eric (2018) -
Defect localization of metal interconnection lines in 3-dimensional through-silicon-via structures by differential scanning photocapacitance microscopy
Jacobs, Kristof J.P.; Stucchi, Michele; Afanasiev, Valeri; Gonzalez, Mario; Croes, Kristof; De Wolf, Ingrid; Beyne, Eric (2018) -
Design and Manufacturing Technology of Advanced Multi-Die Packages on the 'Slope of Enlightenment': Where Is 3D-Test?
Marinissen, Erik Jan; Stucchi, Michele; Vardaman, E. Jan; Armstrong, Dave; Chen, Harry; Goel, Sandeep Kumar; Huang, Yu; McLaurin, Teresa (2021) -
Design and Optimization of SRAM Macro and Logic Using Backside Interconnects at 2nm node
Chen, Rongmei; Sisto, Giuliano; Jourdain, Anne; Hiblot, Gaspard; Stucchi, Michele; Kakarla, Naveen; Chehab, Bilal; Salahuddin, Shairfe Muhammad; Schleicher, Filip; Veloso, Anabela; Hellings, Geert; Weckx, Pieter; Milojevic, Dragomir; Van der Plas, Geert; Ryckaert, Julien; Beyne, Eric (2021) -
Design issues and cosiderations for low-cost 3D TSV IC technology
Van der Plas, Geert; Limaye, Paresh; Mercha, Abdelkarim; Oprins, Herman; Torregiani, Cristina; Thijs, Steven; Linten, Dimitri; Stucchi, Michele; Guruprasad, Katti; Velenis, Dimitrios; Shinichi, Domae; Cherman, Vladimir; Vandevelde, Bart; Simons, Veerle; De Wolf, Ingrid; Labie, Riet; Perry, Dan; Bronckers, Stephane; Minas, Nikolaos; Cupak, Miroslav; Ruythooren, Wouter; Van Olmen, Jan; Phommahaxay, Alain; de Potter de ten Broeck, Muriel; Opdebeeck, Ann; Rakowski, Michal; De Wachter, Bart; Dehan, Morin; Nelis, Marc; Agarwal, Rahul; Dehaene, Wim; Travaly, Youssef; Marchal, Pol; Beyne, Eric (2010) -
Design method and algorithms for directed self-assembly aware via layout decomposition in sub-7 nm circuits
Karageorgos, Ioannis; Ryckaert, Julien; Gronheid, Roel; Tung, Maryann C.; Wong, H.-S. Philip; Karageorgos, Evangelos; Croes, Kris; Bekaert, Joost; Vandenberghe, Geert; Stucchi, Michele; Dehaene, Wim (2016-11) -
Design method for the integration of DSA via patterning in sub-7 nm circuits
Karageorgos, Ioannis; Ryckaert, Julien; Croes, Kris; Tung, C. Maryann; Wong, H. -S. Philip; Karageorgos, Evangelos; Gronheid, Roel; Bekaert, Joost; Vandenberghe, Geert; Stucchi, Michele; Dehaene, Wim (2016)