Browsing by Author "Degryse, Dominiek"
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Publication A finite element study of process induced stress in the transistor channel: effects of silicide contact and gate stack
Proceedings paper2004, EuroSimE: 5th Int. Conf. on Thermal & Mechanical Simulation and Experiments in Micro-Electronics and Micro-Systems, 9/05/2004, p.61-68Publication Bond pad pitch reduction down to 40 μm: influence on solder joint fatigue for flip chip structures
Proceedings paper2002, Proceedings of the 3rd Eurosime Conference, 14/04/2002, p.316-321Publication Copper wire bonding to advanced copper back-end integrated circuits
Oral presentation2003, Semicon Europe, Advanced Packaging SeminarPublication Cross-section nano-indentation for rapid adhesion evaluation
Proceedings paper2004, Materials Technology and Reliability for Advanced Interconnects and Low-k Dielectrics, 13/04/2004, p.291-296Publication Cu bonding to Cu low K wafers: a systematic study of the mechanical bonding process
Proceedings paper2005, Proceedings of the 6th Int. Conf. on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Micro-Electronics, 18/04/2005, p.41-48Publication FEM study of deformation and stresses in copper wire bonds on Cu lowK structures during processing
Proceedings paper2004, Proceedings 54th Electronic Components and Technology Conference, 1/06/2004, p.906-912Publication Finite element analysis of ultra thin BGA package: first and second level reliability
Proceedings paper2004-05, EuroSimE: 5th Int. Conf. on Thermal & Mechanical Simulation and Experiments in Micro-Electronics and Micro-Systems, 9/05/2004, p.225-232Publication Finite element modeling of shear test on bumped Cu-low K wafers
Oral presentation2003, IMAPS Copper/Low-K Semiconductors WorkshopPublication Impact of intermetallic formation and electro-migration on the integrity of bumped Cu/low-k Die
Oral presentation2003, IMAPS Advanced Technology Workshop on Packaging Cu/low-k SemiconductorsPublication Impact of pad finish on mechanical shock resistance of lead-free solder joints tested under shear and in pull mode
Proceedings paper2013, European Microelectronics and Packaging Conference - EMPC, 9/09/2013Publication Kupfer-zu-Kupfer Wire-Bonding erfordert eine Anpassung des Bondprozesses - Massnahmen gegen die Oxidationsgefahr
Journal article2004-04, Elektronik Produktion & Prüftechnik, p.50-52Publication Mechanical behavior of BEOL structures containing lowK dielectrics during bonding process
Proceedings paper2003, EPTC - Electronics Packaging Technology Conference, 10/12/2003, p.815-820Publication Mechanical FEM simulation of bonding process on Cu low K wafers
Proceedings paper2003, Proceedings of the 4th Eurosime conference, 30/03/2003, p.345-351Publication Mechanical FEM simulation of bonding process on Cu lowK wafers
Journal article2004, IEEE Trans. Components and Packaging Technologies, (27) 4, p.643-650Publication Mechanical issues of Cu to Cu wire bonding
Journal article2004-09, IEEE Trans. Components and Packaging Technologies, (27) 3, p.539-545Publication Modified micro-macro thermo-mechanical modelling of ceramic ball grid array packages
; ; Publication On the spatial resolution of scanning spreading resistance microscopy: experimental assessment and electro-mechanical modeling
Proceedings paper2005, Characterization and Metrology for ULSI Technology, 15/03/2005, p.264-269Publication Parameter study for solder joint reliability of underfilled flip chip assemblies
Oral presentation2002, 4th Area Array Packaging Technologies WorkshopPublication Parameter study for the reliability of underfilled flip chip and CSP assemblies
Proceedings paper2002, Proceedings of the European Microelectronics Packaging and Interconnection Symposium - IMAPS-EUROPE, 14/06/2002, p.130-135Publication Parametric compact models for the 72-pins polymer stud grid array (Tm)
Journal article2001, Microelectronics Journal, (32) 10_11, p.839-846