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Browsing by Author "Leys, Frederik"

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    25% drive current improvement for p-type Multiple Gate FET (MuGFET) devices by the introduction of recessed Si0.8Ge0.2 in the source and drain regions

    Verheyen, Peter  
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    Collaert, Nadine  
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    Rooyackers, Rita
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    Loo, Roger  
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    Shamiryan, Denis
    Proceedings paper
    2005, Symposium on VLSI Technology. Digest of Technical Papers, 14/06/2005, p.194-195
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    A step towards a better understanding of silicon passivated (100) Ge p-channel

    Pourtois, Geoffrey  
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    Houssa, Michel  
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    De Jaeger, Brice  
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    Leys, Frederik
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    Kaczer, Ben  
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    Martens, Koen  
    Proceedings paper
    2007, Advanced Gate Stack , Source/Drain and Channel Engineering for Si-Based CMOS 3, 6/05/2007, p.53-63
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    Analysis of the pre-epi bake conditions on the defect creation in recessed Si1-xGex S/D junctions

    Bargallo Gonzalez, Mireia
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    Thomas, Nicole
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    Simoen, Eddy  
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    Verheyen, Peter  
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    Hikavyy, Andriy  
    Proceedings paper
    2007, Analytical and Diagnostic Techniques for Semiconductor Materials, Devices, and Processes 7, 7/10/2007, p.47-53
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    Application of HCl gas phase etch in the production of novel devices

    Hikavyy, Andriy  
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    Rooyackers, Rita
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    Verheyen, Peter  
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    Leys, Frederik
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    Vellianitis, Georgios  
    Proceedings paper
    2008-05, Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS. 4: New Materials, Processes, and Equipment, 18/05/2008, p.329-335
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    Application of single-wafer wet cleaning prior to epitaxial SiGe process

    Sano, Ken-Ichi
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    Wada, Masayuki
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    Leys, Frederik
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    Loo, Roger  
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    Hikavyy, Andriy  
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    Mertens, Paul  
    Journal article
    2009, Solid State Phenomena, 145-146, p.173-176
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    Atomic layer deposition as an enabling technology for fabrication of germanium MOS transistor

    Eneman, Geert  
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    Delabie, Annelies  
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    Van Elshocht, Sven  
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    De Jaeger, Brice  
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    Nicholas, Gareth
    Oral presentation
    2007, 7th International Conference Atomic Layer Deposition Conference - ALD
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    Challenges of single-wafer wet cleaning for low temperature pre-epitaxial treatment of SiGe

    Sano, K.
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    Leys, Frederik
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    Dilliway, Gabriela
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    Loo, Roger  
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    Mertens, Paul  
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    Snow, J.
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    Izumi, A.
    Proceedings paper
    2008, Ultra Clean Processing of Semiconductor Surfaces VIII - UCPSS, 18/09/2006, p.243-246
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    Characteristics of Selective Epitaxial SiGe and Si Deposition processes for recessed source/drain applications

    Loo, Roger  
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    Verheyen, Peter  
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    Eneman, Geert  
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    Rooyackers, Rita
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    Leys, Frederik
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    Shamiryan, Denis
    Proceedings paper
    2005, ASM Users Meeting, 29/09/2005
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    Characteristics of selective epitaxial SiGe deposition processes for recesssed source/drain applications

    Loo, Roger  
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    Verheyen, Peter  
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    Eneman, Geert  
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    Rooyackers, Rita
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    Leys, Frederik
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    Shamiryan, Denis
    Proceedings paper
    2005, 4th International conference on Silicon Epitaxy and Heterostructures - ICSI-4, 23/05/2005, p.112-113
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    Conformal doping of FINFET's: a fabrication and metrology challenge

    Vandervorst, Wilfried  
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    Eyben, Pierre  
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    Mody, Jay
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    Jurczak, Gosia  
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    Nguyen, Duy
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    Takeuchi, Shotaro
    Meeting abstract
    2008, E-MRS Symposium I: Front-End Junction and Contact Formation in Future Silicon/Germanium Based Devices, 26/05/2008
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    Conformal ultra shallow junctions by vapor phase doping with boron

    Nguyen, Duy
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    Leys, Frederik
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    Takeuchi, Shotaro
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    Loo, Roger  
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    Caymax, Matty  
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    Eyben, Pierre  
    Proceedings paper
    2008-05, 4th International SiGe Technology and Device Meeting - ISTDM, 11/05/2008, p.229-230
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    Demonstration of recessed SiGe S/D and inserted metal gate on HfO2 for high performance pFETs

    Verheyen, Peter  
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    Eneman, Geert  
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    Rooyackers, Rita
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    Loo, Roger  
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    Eeckhout, Lieve
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    Rondas, Dirk  
    Proceedings paper
    2005-12, Technical Digest International Electron Devices Meeting (IEDM), 5/12/2005, p.907-910
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    Difference in the nonlinear optical response of epitaxial Si on Ge(001) grown from SiH4 at 500 °C and from Si3H8 at 350 °C

    Valev, Ventsislav
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    Leys, Frederik
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    Caymax, Matty  
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    Verbiest, Thierry
    Oral presentation
    2008, E-MRS Spring Meeting Symposium J: Beyond Silicon Technology: Materials and Devices for Post-Si CMOS
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    Difference in the nonlinear optical response of epitaxial Si on Ge(100) grown from SiH4 at 500°C and from Si3H8 at 350°C due to segregation of Ge

    Valev, V.K.
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    Leys, Frederik
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    Caymax, Matty  
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    Verbiest, T.
    Journal article
    2009, Applied Physics Letters, (94) 6, p.61123
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    Doubling or quadrupling MuGFET Fin integration scheme with higher pattern fidelity, lower CD variation and higher layout efficiency

    Rooyackers, Rita
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    Augendre, Emmanuel
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    Degroote, Bart
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    Collaert, Nadine  
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    Nackaerts, Axel
    Oral presentation
    2007, IEEE International Solid-State Circuits Conference - ISSCC
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    Effect of chemical growth air filter for wafer storage before epitaxial growth

    Wada, Masayuki
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    Sano, Tomohiro
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    Leys, Frederik
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    Dilliway, G.
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    Loo, Roger  
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    Mertens, Paul  
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    Snow, j.
    Proceedings paper
    2008, SEMATECH Meeting, 31/03/2008
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    Electrical and reliability characterization of metal-gate/HfO2/Ge FET's with Si passivation

    Kaczer, Ben  
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    De Jaeger, Brice  
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    Nicholas, Gareth
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    Martens, Koen  
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    Degraeve, Robin  
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    Houssa, Michel  
    Journal article
    2007, Microelectronic Engineering, (84) 9_10, p.2067-2070
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    Epitaxial growth on germanium: kinetics and layer quality

    Bonzom, Renaud
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    Leys, Frederik
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    Loo, Roger  
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    Caymax, Matty  
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    Vandervorst, Wilfried  
    Oral presentation
    2005, 1st International Workshop on New Group IV, Semiconductor Nanoelectronics
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    Epitaxial strained silicon passivation of the Ge/high-k interface in germanium pMOSFET

    Leys, Frederik
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    Mitard, Jerome  
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    Martens, Koen  
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    Pourtois, Geoffrey  
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    Houssa, Michel  
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    Brunco, D.P.
    Proceedings paper
    2008, 4th International SiGe Technology and Device meeting, 11/05/2008
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    Epitaxy solutions for Ge MOS technology

    Leys, Frederik
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    Bonzom, Renaud
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    Loo, Roger  
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    Richard, Olivier  
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    De Jaeger, Brice  
    Proceedings paper
    2005, 4th International Conference on Silicon Epitaxy and Heterostructures - ICSI-4, 23/05/2005
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