Browsing by Author "Li, Xiangdong"

200 mm industrial-ready dispersion-free GaN-on-Si buffer technology for 650 V rated power application

200 V enhancement-mode p-GaN HEMTs fabricated on 200 mm GaN-on-SOI with trench isolation for monolithic integration

200 V enhancement-mode p-GaN HEMTs fabricated on 200 mm GaN-on-SOI with trench isolation for monolithic integration

650 V p-GaN gate power HEMTs on 200 mm engineered substrates

A comprehensive study of MOVPE growth on 200 mm GaN-on-SOI for monolithic integrated GaN ICs

An E-mode p-GaN HEMT monolithically-integrated three-level gate driver operating with a single voltage supply

Analysis of the drain-to-substrate leakage of power HEMTs grown on highly resistive silicon substrate

Buffer vertical leakage mechanism and reliability of 200-mm GaN-on-SOI

CMOS process-compatible 200mm polycrystalline AlN substrates for GaN power transistors

Demonstration of GaN integrated half-bridge with on-chip drivers on 200-mm engineered substrates

Epitaxial growth by MOCVD on 200 mm engineered substrates for power devices & ICs beyond 650 V

Evaluation of novel carrier substrates for high reliability and integrated GaN devices in a 200 mm complementary metal-oxide semiconductor compatible process

GaN Device architectures enabled by next generation substrates

GaN power IC design using the MIT virtual source GaNFET compact model with gate leakage and V-T instability effect

GaN-on-SOI: Monolithically integrated all GaN ICs for power conversion

Impact of crystal orientation on ohmic contact resistance of enhancement-mode pGaN gate high electron mobility transistors on 200 mm Si substrates

Impact of substrate resistivity on the vertical leakage, breakdown, and trapping in GaN-on-Si E-Mode HEMTs

Impact of the substrate and buffer design on the performance of GaN on Si

Influence of driver integration on GaN enhancement mode transistor performance

Influence of Driver Integration on GaN Enhancement Mode Transistor Performance