Browsing by Author "Tokei, Zsolt"
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Publication 1/f noise measurements for faster electromigration characterization
Proceedings paper2016, IEEE International Reliability Physics Symposium - IRPS, 17/04/2016, p.5B.3Publication 1/f noise measurements for faster evaluation of electromigration in advanced microelectronics interconnections
Journal article2016, Journal of Applied Physics, (119) 18, p.184302Publication 1Xnm copper and low-k reliability
Proceedings paper2011-09, International Conference on Solid State Devices and Materials - SSDM, 28/09/2011, p.777-778Publication 21 nm Pitch dual-damascene BEOL process integration with full barrierless Ru metallization
Proceedings paper2019, IEEE International Interconnect Technology Conference (IITC 2019) and Materials for Advanced Metallization Conference (MAM 2019), 3/06/2019, p.3.4Publication 28nm pitch single exposure patterning readiness by metal oxide resist on 0.33NA EUV Lithography
Publication 300mm IGZO nFETs with low-T Ru contacts for localized doping and increased BEOL compatibility
Proceedings paper2020, International Conference on Solid State Devices and Materials - SSDM, 27/09/2020, p.J-6-03Publication 300mm wafer level CVD-Mn/iodine-CVD-Cu-based metallization study for advanced copper interconnections
Meeting abstract2016, Materials for Advanced Metallization Conference - MAM, 20/03/2016Publication 45nm nMOSFET with metal gate on thin SiON driving 1150μA/μm and off-state of 10nA/μm
; ; Publication A comprehensive LER-aware TDDB lifetime model for advanced Cu interconnects
Journal article2011, IEEE Transactions on Device and Materials Reliability, (11) 2, p.278-289Publication A DRAM compatible Cu contact using self-aligned Ta-silicide and Ta-barrier
Journal article2008, Microelectronic Engineering, (85) 10, p.2009-2012Publication A feasibility study of dual damascene porous SiLK resin with spin-on hard masks
Proceedings paper2004, Advanced Metallization Conference 2003, 21/10/2003, p.147-151Publication A high-reliable Cu/ULK integration scheme using Metal Hard Mask and Low-k capping film
Oral presentation2007, Advanced Metallization Conference: 17th Asian SessionPublication A large scale systematic study of graphene/metal contact resistance using cTLM
Meeting abstract2014, Graphene Poster Book, 6/05/2014, p.127Publication A method to pattern tight tip-to-tip in 32nm-pitch N5 interconnect using Ru area selective deposition tone inversion process
Oral presentation2018, Materials for Advanced Metallization Conference - MAMPublication A million wafer, virtual fabrication approach to determine process capability requirements for an industry-standard 5nm BEOL two-level metal flow
Proceedings paper2016, International Conference on Simulation of Semiconductor Processes and Devices - SISPAD, 6/09/2016, p.43-46Publication A multilevel sub-modeling approach to evaluate 3D IC packaging induced stress on hybrid interconnect structures
Meeting abstract2013, Materials for Advances Metallization - MAM, 10/03/2013Publication A NEMS based sensor to monitor stress in deep sub-micron Cu/Low-$k$ interconnects
Journal article2009, Semicond. Sci. Technol., (24) 11, p.115018Publication A new perspective of barrier material evaluation and process optimization
Proceedings paper2009, IEEE International Interconnect Technology Conference - IITC, 1/06/2009, p.206-208Publication A novel electromigration characterization method based on low-frequency noise measurements
Journal article2019, Semiconductor Science and Technology, (34) 7, p.75002Publication A novel plasma-assisted shrink process to enlarge process windows of narrow trenches and contacts for 45-nm node applications and beyond
; ; ; ; Proceedings paper2007, Advances in Resist Materials and Processing Technology XXIV, 25/02/2007, p.65190U