Browsing by author "Arimura, Hiroaki"
Now showing items 21-40 of 116
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Demonstration of an InGaAs gate stack with sufficient PBTI reliability by thermal budget optimization, nitridation, high-k material choice, and interface dipole
Franco, Jacopo; Vais, Abhitosh; Sioncke, Sonja; Putcha, Vamsi; Kaczer, Ben; Shie, Bo-Shiuan; Shi, Xiaoping; Reyhaneh, Mahlouji; Nyns, Laura; Zhou, Daisy; Waldron, Niamh; Maes, Jan; Xie, Qi; Givens, M.; Tang, F.; Jiang, X.; Arimura, Hiroaki; Schram, Tom; Ragnarsson, Lars-Ake; Sibaja-Hernandez, Arturo; Hellings, Geert; Horiguchi, Naoto; Heyns, Marc; Groeseneken, Guido; Linten, Dimitri; Collaert, Nadine; Thean, Aaron (2016) -
Device-based threading dislocation assessment in germanium hetero-epitaxy
Simoen, Eddy; Hsu, Brent; Eneman, Geert; Rosseel, Erik; Loo, Roger; Arimura, Hiroaki; Horiguchi, Naoto; Claeys, Cor; Wen, Wei-Chen; Nakashima, Hiroshi; Oliveira, Alberto; Agopian, Paula G.D.; Martino, Joao (2019) -
Dipole-First Gate Stack as a Scalable and Thermal Budget Flexible Multi-Vt Solution for Nanosheet/CFET Devices
Arimura, Hiroaki; Ragnarsson, Lars-Ake; Oniki, Yusuke; Franco, Jacopo; Vandooren, Anne; Brus, Stephan; Leonhardt, A.; Sippola, P.; Ivanova, T.; Verni, G. Alessio; Chang, R-J; Xie, Q.; Givens, M.; Mitard, Jerome; Biesemans, Serge; Dentoni Litta, Eugenio; Horiguchi, Naoto (2021) -
Dynamic threshold voltage influence on Ge pMOSFET hysteresis
Oliveira, A. V.; Agopian, P. G. D.; Martino, A.; Arimura, Hiroaki; Mitard, Jerome; Mertens, Hans; Mocuta, Anda; Collaert, Nadine; Simoen, Eddy; Claeys, Cor; Thean, Aaron (2015) -
Enabling Logic with Backside Connectivity via n-TSVs and its Potential as a Scaling Booster
Veloso, Anabela; Jourdain, Anne; Hiblot, Gaspard; Schleicher, Filip; D'have, Koen; Sebaai, Farid; Radisic, Dunja; Loo, Roger; Hopf, Toby; De Keersgieter, An; Arimura, Hiroaki; Eneman, Geert; Favia, Paola; Geypen, Jef; Arutchelvan, Goutham; Vaisman Chasin, Adrian; Jang, Doyoung; Nyns, Laura; Rosseel, Erik; Hikavyy, Andriy; Mannaert, Geert; Chan, BT; Devriendt, Katia; Demuynck, Steven; Van der Plas, Geert; Ryckaert, Julien; Beyer, Gerald; Dentoni Litta, Eugenio; Beyne, Eric; Horiguchi, Naoto (2021) -
Enhancing the quality of low temperature SiO2 by atomic hydrogen exposure for excellent NBTI reliability
Franco, Jacopo; de Marneffe, Jean-Francois; Vandooren, Anne; Kimura, Yosuke; Nyns, Laura; Wu, Zhicheng; El-Sayed, Al-Moatasem; Jech, Markus; Waldhoer, Dominic; Claes, Dieter; Arimura, Hiroaki; Ragnarsson, Lars-Ake; Afanas'ev, Valeri; Stesmans, Andre; Horiguchi, Naoto; Linten, Dimitri; Grasser, Tibor; Kaczer, Ben (2020) -
Epitaxial CVD growth of ultra-thin Si passivation layers on Ge using Si4H10 to enable growth temperatures down to 330 °C
Loo, Roger; Vanherle, Wendy; Arimura, Hiroaki; Cott, Daire; Witters, Liesbeth; Douhard, Bastien; Mitard, Jerome; Collaert, Nadine (2017-05) -
Epitaxial CVD growth of ultra-thin Si passivation layers on strained Ge Fin structures
Loo, Roger; Arimura, Hiroaki; Cott, Daire; Witters, Liesbeth; Pourtois, Geoffrey; Schulze, Andreas; Douhard, Bastien; Vanherle, Wendy; Eneman, Geert; Richard, Olivier; Favia, Paola; Mitard, Jerome; Mocuta, Dan; Langer, Robert; Collaert, Nadine (2017-09) -
Epitaxial CVD growth of ultra-thin Si passivation layers on strained Ge FIN structures
Loo, Roger; Arimura, Hiroaki; Cott, Daire; Witters, Liesbeth; Pourtois, Geoffrey; Schulze, Andreas; Douhard, Bastien; Vanherle, Wendy; Richard, Olivier; Favia, Paola; Eneman, Geert; Mitard, Jerome; Collaert, Nadine (2017-07) -
Epitaxial CVD growth of ultra-thin Si passivation layers on strained Ge fin structures
Loo, Roger; Arimura, Hiroaki; Cott, Daire; Witters, Liesbeth; Pourtois, Geoffrey; Schulze, Andreas; Douhard, Bastien; Vanherle, Wendy; Eneman, Geert; Richard, Olivier; Favia, Paola; Mitard, Jerome; Mocuta, Dan; Langer, Robert; Collaert, Nadine (2018-02) -
FinFETs with Thermally Stable RMG Gate Stack for Future DRAM Peripheral Circuits
Capogreco, Elena; Arimura, Hiroaki; Ritzenthaler, Romain; Brus, Stephan; Oniki, Yusuke; Dupuy, Emmanuel; Sebaai, Farid; Radisic, Dunja; Chan, BT; Zhou, Daisy; Machkaoutsan, V.; Yoon, S.; Itokawa, H.; Yamaguchi, M.; Gao, Z.; Fazan, P.; Chen, Y.; Subramanian, Sujith; Ragnarsson, Lars-Ake; Spessot, Alessio; Dentoni Litta, Eugenio (2022) -
First demonstration of 15nm-WFIN inversion-mode relaxed germanium bulk nFinFET with Si-cap free RMG and NiSiGe source/drain
Mitard, Jerome; Witters, Liesbeth; Arimura, Hiroaki; Sasaki, Yuichiro; Milenin, Alexey; Loo, Roger; Hikavyy, Andriy; Eneman, Geert; Lagrain, Pieter; Mertens, Hans; Sioncke, Sonja; Vrancken, Christa; Bender, Hugo; Barla, Kathy; Horiguchi, Naoto; Mocuta, Anda; Collaert, Nadine; Thean, Aaron (2014) -
First demonstration of vertically stacked gate-all-around highly strained germanium nanowire pFETs
Capogreco, Elena; Witters, Liesbeth; Arimura, Hiroaki; Sebaai, Farid; Porret, Clément; Hikavyy, Andriy; Loo, Roger; Milenin, Alexey; Eneman, Geert; Favia, Paola; Bender, Hugo; Wostyn, Kurt; Dentoni Litta, Eugenio; Schulze, Andreas; Vrancken, Christa; Opdebeeck, Ann; Mitard, Jerome; Langer, Robert; Holsteyns, Frank; Waldron, Niamh; Barla, Kathy; De Heyn, Vincent; Mocuta, Dan; Collaert, Nadine (2018-11) -
First demonstration of vertically-stacked gate-all-around highly-strained germanium nanowire p-FETs
Capogreco, Elena; Witters, Liesbeth; Arimura, Hiroaki; Sebaai, Farid; Porret, Clément; Hikavyy, Andriy; Loo, Roger; Milenin, Alexey; Eneman, Geert; Favia, Paola; Bender, Hugo; Wostyn, Kurt; Dentoni Litta, Eugenio; Schulze, Andreas; Vrancken, Christa; Opdebeeck, Ann; Mitard, Jerome; Langer, Robert; Holsteyns, Frank; Waldron, Niamh; Barla, Kathy; De Heyn, Vincent; Mocuta, Dan; Collaert, Nadine (2018) -
Gate metal and cap layer effects on Ge nMOSFETs low frequency noise behavior
He, Liang; Zhao, Pan; Liu, Jiahao; Su, Yahui; Chen, Hua; Jia, Xiaofei; Arimura, Hiroaki; Mitard, Jerome; Witters, Liesbeth; Horiguchi, Naoto; Collaert, Nadine; Claeys, Cor; Simoen, Eddy (2019-12) -
Gate stack thermal stability and PBTI reliability challenges for 3D sequential integration: demonstration of a suitable gate stack for top and bottom tier nMOS
Franco, Jacopo; Witters, Liesbeth; Vandooren, Anne; Arimura, Hiroaki; Sioncke, Sonja; Putcha, Vamsi; Vais, Abhitosh; Xie, Qi; Givens, Michael; Tang, Fu; Jiang, X.; Subirats, Alexandre; Vaisman Chasin, Adrian; Ragnarsson, Lars-Ake; Kaczer, Ben; Linten, Dimitri; Collaert, Nadine (2017) -
Ge Devices: a potential candidate for sub-5nm nodes?
Sharan, Neha; Shaik, Khaja Ahmad; Jang, Doyoung; Schuddinck, Pieter; Yakimets, Dmitry; Garcia Bardon, Marie; Mitard, Jerome; Arimura, Hiroaki; Bufler, Fabian; Eneman, Geert; Collaert, Nadine; Parvais, Bertrand; Spessot, Alessio; Mocuta, Anda (2019) -
Ge gate stack passivation for MOS devices: need for atomically controlled processing
Sioncke, Sonja; Arimura, Hiroaki; Cott, Daire; Franco, Jacopo; Collaert, Nadine; Thean, Aaron (2014) -
Ge nFET with high electron mobility and superior PBTI reliability enabled by monolayer-Si surface passivation and La-induced interface dipole formation
Arimura, Hiroaki; Sioncke, Sonja; Cott, Daire; Mitard, Jerome; Conard, Thierry; Vanherle, Wendy; Loo, Roger; Favia, Paola; Bender, Hugo; Meersschaut, Johan; Witters, Liesbeth; Mertens, Hans; Franco, Jacopo; Ragnarsson, Lars-Ake; Pourtois, Geoffrey; Heyns, Marc; Mocuta, Anda; Collaert, Nadine; Thean, Aaron (2015) -
Ge oxide scavenging and gate stack nitridation for strained Si0.7Ge0.3 pFinFETs enabling 35% higher mobility than Si
Arimura, Hiroaki; Wostyn, Kurt; Ragnarsson, Lars-Ake; Capogreco, Elena; Vaisman Chasin, Adrian; Conard, Thierry; Brus, Stephan; Favia, Paola; Franco, Jacopo; Mitard, Jerome; Demuynck, Steven; Horiguchi, Naoto (2019)