Browsing by author "Franco, Jacopo"
Now showing items 1-20 of 273
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15nm-WFIN high-performance low-defectivity strained-germanium pFinFETs with low temperature STI-last process
Mitard, Jerome; Witters, Liesbeth; Loo, Roger; Lee, Seung Hun; Sun, J.W.; Franco, Jacopo; Ragnarsson, Lars-Ake; Brand, A.; Lu, X.; Yoshido, N.; Eneman, Geert; Brunco, David; Vorderwestner, M.; Storck, P.; Milenin, Alexey; Hikavyy, Andriy; Waldron, Niamh; Favia, Paola; Vanhaeren, Danielle; Vanderheyden, Annelies; Richard, Olivier; Mertens, Hans; Arimura, Hiroaki; Sioncke, Sonja; Vrancken, Christa; Bender, Hugo; Eyben, Pierre; Barla, Kathy; Lee, Sun Ghil; Horiguchi, Naoto; Collaert, Nadine; Thean, Aaron (2014) -
1mA/μm-ION strained SiGe45%-IFQW pFETs with raised and embedded S/D
Mitard, Jerome; Witters, Liesbeth; Hellings, Geert; Krom, Raymond; Franco, Jacopo; Eneman, Geert; Hikavyy, Andriy; Vincent, Benjamin; Loo, Roger; Favia, Paola; Dekkers, Harold; Altamirano Sanchez, Efrain; Vanderheyden, Annelies; Vanhaeren, Danielle; Eyben, Pierre; Takeoka, Shinji; Yamaguchi, Shinpei; Van Dal, Mark; Wang, Wei-E; Hong, Sug-Hun; Vandervorst, Wilfried; De Meyer, Kristin; Biesemans, Serge; Absil, Philippe; Horiguchi, Naoto; Hoffmann, Thomas Y. (2011) -
3D sequential CMOS top tier devices demonstration using a low temperature Smart Cu (TM) Si layer transfer
Besnard, Guillaume; Radu, Ionut; Vandooren, Anne; Wu, Zhicheng; Franco, Jacopo; Li, Waikin; Arimura, Hiroaki; Mannaert, Geert; Rosseel, Erik; Hikavyy, Andriy; Dentoni Litta, Eugenio; Horiguchi, Naoto (2021) -
3D sequential low temperature top tier devices using dopant activation with excimer laser anneal and strained silicon as performance boosters
Vandooren, Anne; Wu, Zhicheng; Parihar, Narendra; Franco, Jacopo; Parvais, Bertrand; Matagne, Philippe; Debruyn, Haroen; Mannaert, Geert; Devriendt, Katia; Teugels, Lieve; Vecchio, Emma; Radisic, Dunja; Rosseel, Erik; Hikavyy, Andriy; Chan, BT; Waldron, Niamh; Mitard, Jerome; Besnard, G.; Alvarez, A.; Gaudin, G.; Schwarzenbach, W.; Radu, I.; Nguyen, B. Y.; Huet, K.; Tabata, T.; Mazzamuto, F.; Demuynck, Steven; Boemmels, Juergen; Collaert, Nadine; Horiguchi, Naoto (2020) -
3D sequential stacked planar devices featuring low-temperature replacement metal gate junctionless top devices with improved reliability
Vandooren, Anne; Franco, Jacopo; Parvais, Bertrand; Wu, Zhicheng; Witters, Liesbeth; Walke, Amey; Li, Waikin; Peng, Lan; Deshpande, Veeresh Vidyadhar; Bufler, Fabian; Rassoul, Nouredine; Hellings, Geert; Jamieson, Geraldine; Inoue, Fumihiro; Verbinnen, Greet; Devriendt, Katia; Teugels, Lieve; Heylen, Nancy; Vecchio, Emma; Tao, Zheng; Rosseel, Erik; Vanherle, Wendy; Hikavyy, Andriy; Chan, BT; Ritzenthaler, Romain; Besnard, Guillaume; Schwarzenbach, Walter; Gaudin, Gweltaz; Radu, Ionut; Nguyen, Bich-Yen; Waldron, Niamh; De Heyn, Vincent; Mocuta, Dan; Collaert, Nadine (2018-11) -
3D sequential stacked planar devices on 300 mm wafers featuring replacement metal gate junction-less top devices processed at 525°C with improved reliability
Vandooren, Anne; Franco, Jacopo; Parvais, Bertrand; Wu, Zhicheng; Witters, Liesbeth; Walke, Amey; Li, Waikin; Peng, Lan; Deshpande, Veeresh Vidyadhar; Bufler, Fabian; Rassoul, Nouredine; Hellings, Geert; Jamieson, Geraldine; Inoue, Fumihiro; Verbinnen, Greet; Devriendt, Katia; Teugels, Lieve; Heylen, Nancy; Vecchio, Emma; Tao, Zheng; Rosseel, Erik; Vanherle, Wendy; Hikavyy, Andriy; Chan, BT; Ritzenthaler, Romain; Besnard, Guillaume; Schwarzenbach, Walter; Gaudin, Gweltaz; Radu, Ionut; Nguyen, Bich-Yen; Waldron, Niamh; De Heyn, Vincent; Mocuta, Dan; Collaert, Nadine (2018) -
6Å EOT Si0.45Ge0.55 pMOSFET with optimized reliability (VDD=1V): Meeting the NBTI lifetime target at ultra-thin EOT
Franco, Jacopo; Kaczer, Ben; Eneman, Geert; Mitard, Jerome; Stesmans, Andre; Afanasiev, Valeri; Kauerauf, Thomas; Roussel, Philippe; Toledano-Luque, Maria; Cho, Moon Ju; Degraeve, Robin; Grasser, Tibor; Ragnarsson, Lars-Ake; Witters, Liesbeth; Tseng, Joshua; Takeoka, Shinji; Wang, Wei-E; Hoffmann, Thomas Y.; Groeseneken, Guido (2010) -
8Å Tinv gate-first dual channel technology achieving low-Vt high performance CMOS
Witters, Liesbeth; Takeoka, Shinji; Yamaguchi, Shinpei; Hikavyy, Andriy; Shamiryan, Denis; Cho, Moon Ju; Chiarella, Thomas; Ragnarsson, Lars-Ake; Loo, Roger; Kerner, Christoph; Crabbe, Yvo; Franco, Jacopo; Tseng, Joshua; Wang, Wei-E; Rohr, Erika; Schram, Tom; Richard, Olivier; Bender, Hugo; Biesemans, Serge; Absil, Philippe; Hoffmann, Thomas Y. (2010) -
A brief overview of gate oxide defect properties and their relation to MOSFET instabilities and device and circuit time-dependent variability
Kaczer, Ben; Franco, Jacopo; Weckx, Pieter; Roussel, Philippe; Putcha, Vamsi; Bury, Erik; Simicic, Marko; Vaisman Chasin, Adrian; Linten, Dimitri; Parvais, Bertrand; Catthoor, Francky; Rzepa, Gerhard; Waltl, Michael; Grasser, Tibor (2018) -
A BSIM-Based Predictive Hot-Carrier Aging Compact Model
Xiang, Yang; Tyaginov, Stanislav; Vandemaele, Michiel; Wu, Zhicheng; Franco, Jacopo; Bury, Erik; Truijen, Brecht; Parvais, Bertrand; Linten, Dimitri; Kaczer, Ben (2021) -
A compact NBTI model for accurate analog integrated circuit reliability simulation
Maricau, Elie; Zhang, Leqi; Franco, Jacopo; Roussel, Philippe; Groeseneken, Guido; Gielen, Georges (2011) -
A defect-centric analysis of the temperature dependence of the channel hot carrier degradation in nMOSFETs
Procel, Luis Miguel; Crupi, Felice; Lionel, Trojman; Franco, Jacopo; Kaczer, Ben (2016) -
A defect-centric perspective on channel hot carrier variability in nMOSFETs
Procel, Luis Miguel; Crupi, Felice; Franco, Jacopo; Trojman, Lionel; Kaczer, Ben; Wils, N.; Tuinhout, H. (2015) -
A drift-diffusion-based analytic description of the energy distribution function for hot-carrier degradation in decananometer NMOSFETs
Sharma, P.; Tyaginov, S.; Rauch, S.E.; Franco, Jacopo; Kaczer, Ben; Makarov, A.; Vexler, M.I.; Grasser, T. (2016) -
A multi-energy level agnostic approach for defect generation during TDDB stress
Vici, Andrea; Degraeve, Robin; Kaczer, Ben; Franco, Jacopo; Van Beek, Simon; De Wolf, Ingrid (2022) -
A multi-energy level agnostic simulation approach to defect generation
Vici, Andrea; Degraeve, Robin; Kaczer, Ben; Franco, Jacopo; Van Beek, Simon; De Wolf, Ingrid (2021) -
A new quality metric for III-V/high-k MOS gate stacks based on the frequency dispersion of accumulation capacitance and the CET
Vais, Abhitosh; Franco, Jacopo; Martens, Koen; Lin, Dennis; Sioncke, Sonja; Putcha, Vamsi; Nyns, Laura; Maes, Jan; Xie, Qi; Givens, Michael; Tang, Fu; Jiang, Xiaoqiang; Mocuta, Anda; Collaert, Nadine; Thean, Aaron; De Meyer, Kristin (2017) -
A physics-aware compact modeling framework for transistor aging in the entire bias space
Wu, Zhicheng; Franco, Jacopo; Roussel, Philippe; Tyaginov, Stanislav; Truijen, Brecht; Vandemaele, Michiel; Hellings, Geert; Collaert, Nadine; Groeseneken, Guido; Linten, Dimitri; Kaczer, Ben (2019) -
A Pragmatic Model to Predict Future Device Aging
Brown, James; Tok, Kean Hong; Gao, Rui; Ji, Zhigang; Zhang, Weidong; Marsland, John S.; Chiarella, Thomas; Franco, Jacopo; Kaczer, Ben; Linten, Dimitri; Zhang, Jian Fu (2023) -
A test-proven As-grown-Generation (A-G) model for predicting NBTI under use-bias
Ji, Z.; Zhang, J.F.; Lin, L.; Duan, M.; Zhang, W.; Zhang, X.; Gao, R.; Kaczer, Ben; Franco, Jacopo; Schram, Tom; Horiguchi, Naoto; De Gendt, Stefan; Groeseneken, Guido (2015)