Browsing by author "Kikuchi, Yoshiaki"
Now showing items 1-17 of 17
-
12-EUV layer Surrounding Gate Transistor (SGT) for vertical 6-T SRAM: 5-nm-class technology for ultra-density logic devices
Kim, Min-Soo; Harada, N.; Kikuchi, Yoshiaki; Boemmels, Juergen; Mitard, Jerome; Huynh Bao, Trong; Matagne, Philippe; Tao, Zheng; Li, Waikin; Devriendt, Katia; Ragnarsson, Lars-Ake; Lorant, Christophe; Sebaai, Farid; Porret, Clément; Rosseel, Erik; Dangol, Anish; Batuk, Dmitry; Martinez Alanis, Gerardo Tadeo; Geypen, Jef; Jourdan, Nicolas; Sepulveda Marquez, Alfonso; Puliyalil, Harinarayanan; Jamieson, Geraldine; van der Veen, Marleen; Teugels, Lieve; El-Mekki, Zaid; Altamirano Sanchez, Efrain; Li, Y.; Nakamura, H.; Mocuta, Dan; Matsuoka, F. (2019) -
Analysis of diffusion mechanisms for SSD in confined volumes : An alternative solution for extension formation in N7 and N5 technologies
Eyben, Pierre; Pawlak, Bartek; De Keersgieter, An; Kikuchi, Yoshiaki; Mitard, Jerome; Horiguchi, Naoto; Mocuta, Dan; Mocuta, Anda (2018) -
CMOS patterning over high aspect ratio topographies for N10/N7 using spin-on carbon hardmasks
Hopf, Toby; Ercken, Monique; Mannaert, Geert; Kunnen, Eddy; Tao, Zheng; Vandenbroeck, Nadia; Sebaai, Farid; Kikuchi, Yoshiaki; Mertens, Hans; Kubicek, Stefan; Demuynck, Steven; Horiguchi, Naoto (2017) -
CMOS patterning over high-aspect ratio topographies for N10/N7 using spin-on carbon hardmasks
Hopf, Toby; Ercken, Monique; Mannaert, Geert; Kunnen, Eddy; Tao, Zheng; Vandenbroeck, Nadia; Sebaai, Farid; Kikuchi, Yoshiaki; Mertens, Hans; Kubicek, Stefan; Demuynck, Steven; Horiguchi, Naoto (2017) -
DTCO and TCAD for a 12 layer-EUV ultra-scaled surrounding gate transistor 6T-SRAM
Matagne, Philippe; Nakamura, H.; Kim, Min-Soo; Kikuchi, Yoshiaki; Huynh Bao, Trong; Tao, Zheng; Li, Waikin; Devriendt, Katia; Ragnarsson, Lars-Ake; Boemmels, Juergen; Mallik, Arindam; Altamirano Sanchez, Efrain; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Porret, Clément; Mocuta, Dan; Harada, N.; Matsuoka, F. (2018) -
Electrical characteristics of P-type bulk Si fin field-effect transistor using solid-source doping with 1-nm phosphosilicate glass
Kikuchi, Yoshiaki; Chiarella, Thomas; De Roest, David; Blanquart, Timothee; De Keersgieter, An; Kenis, Karine; Peter, Antony; Ong, Patrick; Van Besien, Els; Tao, Zheng; Kim, Min-Soo; Kubicek, Stefan; Chew, Soon Aik; Schram, Tom; Demuynck, Steven; Mocuta, Anda; Mocuta, Dan; Horiguchi, Naoto (2016) -
FEOL patterning challenges in scaled SRAM with vertical Surrounding Gate Transistors (SGT)
Tao, Zheng; Li, Waikin; Kim, Min-Soo; Devriendt, Katia; Lorant, Christophe; Sebaai, Farid; Porret, Clément; Rosseel, Erik; Sepulveda Marquez, Alfonso; Jourdan, Nicolas; Kikuchi, Yoshiaki; Boemmels, Juergen; Mitard, Jerome; Matagne, Philippe; Ragnarsson, Lars-Ake; Dangol, Anish; Batuk, Dmitry; Martinez Alanis, Gerardo Tadeo; Geypen, Jef; Altamirano Sanchez, Efrain; Lee, James; Li, YiSuo; Kanazawa, Kenichi; Harada, Nozomu; Masuoka, Fujio (2019) -
Gate-all-around transistors based on vertically stacked Si nanowires
Mertens, Hans; Ritzenthaler, Romain; Hikavyy, Andriy; Kim, Min-Soo; Tao, Zheng; Wostyn, Kurt; Schram, Tom; Kunnen, Eddy; Ragnarsson, Lars-Ake; Dekkers, Harold; Hopf, Toby; Devriendt, Katia; Tsvetanova, Diana; Chew, Soon Aik; Kikuchi, Yoshiaki; Van Besien, Els; Rosseel, Erik; Mannaert, Geert; De Keersgieter, An; Vaisman Chasin, Adrian; Kubicek, Stefan; Dangol, Anish; Demuynck, Steven; Barla, Kathy; Mocuta, Dan; Horiguchi, Naoto (2017) -
Improvement in drain-induced-barrier-lowering and on-state current characteristics of bulk Si fin field-effect-transistors using high temperature phosphorus extension ion implantation
Kikuchi, Yoshiaki; Hopf, Toby; Mannaert, Geert; Everaert, Jean-Luc; Kubicek, Stefan; Eyben, Pierre; Waite, Andrew; Borniquel, Jose; Variam, Naushad; Mocuta, Dan; Horiguchi, Naoto (2019) -
Improvement of the CMOS characteristics of bulk Si FinFETs by high temperature ion implantation
Kikuchi, Yoshiaki; Hopf, Toby; Mannaert, Geert; Tao, Zheng; Waite, A.; Cournoyer, J.; Borniquel, J.; Schreutelkamp, Rob; Ritzenthaler, Romain; Kim, Min-Soo; Kubicek, Stefan; Chew, Soon Aik; Devriendt, Katia; Schram, Tom; Demuynck, Steven; Variam, N.; Horiguchi, Naoto; Mocuta, Dan (2016) -
Interconnects for scaled SRAM with vertical Surrounded Gate Transistors (SGT)
Boemmels, Juergen; Harada, N.; Kim, Min-Soo; Mitard, Jerome; Kikuchi, Yoshiaki; Li, Waikin; Tao, Zheng; Puliyalil, Harinarayanan; Devriendt, Katia; Lorant, Christophe; Le, Quoc Toan; Kesters, Els; Jourdan, Nicolas; El-Mekki, Zaid; Teugels, Lieve; van der Veen, Marleen; Li, Y.; Nakamura, H.; Mocuta, Dan; Masuoka, F. (2019) -
Junction technology challenges and solutions for 3D device architecture
Kikuchi, Yoshiaki; Mertens, Hans; Ritzenthaler, Romain; Chiarella, Thomas; Peter, Antony; Horiguchi, Naoto (2019) -
Novel junction design for NMOS Si bulk-FinFETs with extension doping by phosphorus doped silicate glass
Sasaki, Yuichiro; Ritzenthaler, Romain; Kimura, Y.; De Roest, David; Shi, Xiaoping; De Keersgieter, An; Kim, Min-Soo; Chew, Soon Aik; Kubicek, Stefan; Schram, Tom; Kikuchi, Yoshiaki; Demuynck, Steven; Veloso, Anabela; Vandervorst, Wilfried; Horiguchi, Naoto; Mocuta, Dan; Mocuta, Anda; Thean, Aaron (2015) -
Patterning challenges in advanced device architectures: FinFETs to nanowire
Horiguchi, Naoto; Milenin, Alexey; Tao, Zheng; Hody, Hubert; Altamirano Sanchez, Efrain; Veloso, Anabela; Witters, Liesbeth; Waldron, Niamh; Ragnarsson, Lars-Ake; Kim, Min-Soo; Kikuchi, Yoshiaki; Mertens, Hans; Raghavan, Praveen; Piumi, Daniele; Collaert, Nadine; Barla, Kathy; Thean, Aaron (2016) -
Solid-source doping by using phospho-silicate glass into P-type bulk Si (100) substrate: role of the capping SiO2 barrier
Kikuchi, Yoshiaki; Peter, Antony; De Keersgieter, An; Pawlak, Bartek; Eyben, Pierre; Horiguchi, Naoto; Mocuta, Anda (2018) -
The improvement of subthreshold slope and trans-conductance of P-type bulk Si field-effect-transistors by solid-source doping
Kikuchi, Yoshiaki; Chiarella, Thomas; De Roest, David; Kenis, Karine; Ong, Patrick; Horiguchi, Naoto (2017) -
Vertically stacked gate-all-around Si nanowire CMOS transistors with dual work function metal gates
Mertens, Hans; Ritzenthaler, Romain; Vaisman Chasin, Adrian; Schram, Tom; Kunnen, Eddy; Hikavyy, Andriy; Ragnarsson, Lars-Ake; Dekkers, Harold; Hopf, Toby; Wostyn, Kurt; Devriendt, Katia; Chew, Soon Aik; Kim, Min-Soo; Kikuchi, Yoshiaki; Rosseel, Erik; Mannaert, Geert; Kubicek, Stefan; Demuynck, Steven; Dangol, Anish; Bosman, Niels; Geypen, Jef; Carolan, Patrick; Bender, Hugo; Barla, Kathy; Horiguchi, Naoto; Mocuta, Dan (2016-12)