Browsing by author "Teugels, Lieve"

Now showing items 1-20 of 102

    • 12-EUV layer Surrounding Gate Transistor (SGT) for vertical 6-T SRAM: 5-nm-class technology for ultra-density logic devices 

      Kim, Min-Soo; Harada, N.; Kikuchi, Yoshiaki; Boemmels, Juergen; Mitard, Jerome; Huynh Bao, Trong; Matagne, Philippe; Tao, Zheng; Li, Waikin; Devriendt, Katia; Ragnarsson, Lars-Ake; Lorant, Christophe; Sebaai, Farid; Porret, Clément; Rosseel, Erik; Dangol, Anish; Batuk, Dmitry; Martinez Alanis, Gerardo Tadeo; Geypen, Jef; Jourdan, Nicolas; Sepulveda Marquez, Alfonso; Puliyalil, Harinarayanan; Jamieson, Geraldine; van der Veen, Marleen; Teugels, Lieve; El-Mekki, Zaid; Altamirano Sanchez, Efrain; Li, Y.; Nakamura, H.; Mocuta, Dan; Matsuoka, F. (2019)

    • 28nm pitch single exposure patterning readiness by metal oxide resist on 0.33NA EUV Lithography 

      Kim, Il Hwan; Kim, Insung; Park, Changmin; Lee, Jsiun; Ryu, Koungmin; De Schepper, P.; Doise, J.; Kocsis, M.; De Simone, Danilo; Kljucar, Luka; Das, Poulomi; Blanc, Romuald; Beral, Christophe; Severi, Joren; Vandenbroeck, Nadia; Foubert, Philippe; Charley, Anne-Laure; Oak, Apoorva; Xu, Dongbo; Gillijns, Werner; Mitard, Jerome; Tokei, Zsolt; van der Veen, Marleen; Heylen, Nancy; Teugels, Lieve; Le, Quoc Toan; Schleicher, Filip; Leray, Philippe; Ronse, Kurt (2021)

    • 300mm IGZO nFETs with low-T Ru contacts for localized doping and increased BEOL compatibility 

      Kljucar, Luka; Smets, Quentin; van Setten, Michiel; Mitard, Jerome; Belmonte, Attilio; Dekkers, Harold; Teugels, Lieve; Mao, Ming; Puliyalil, Harinarayanan; del Agua Borniquel, Jose Ignacio; Delhougne, Romain; Sankaran, Kiroubanand; Tokei, Zsolt (2020)

    • 3D sequential low temperature top tier devices using dopant activation with excimer laser anneal and strained silicon as performance boosters 

      Vandooren, Anne; Wu, Zhicheng; Parihar, Narendra; Franco, Jacopo; Parvais, Bertrand; Matagne, Philippe; Debruyn, Haroen; Mannaert, Geert; Devriendt, Katia; Teugels, Lieve; Vecchio, Emma; Radisic, Dunja; Rosseel, Erik; Hikavyy, Andriy; Chan, BT; Waldron, Niamh; Mitard, Jerome; Besnard, G.; Alvarez, A.; Gaudin, G.; Schwarzenbach, W.; Radu, I.; Nguyen, B. Y.; Huet, K.; Tabata, T.; Mazzamuto, F.; Demuynck, Steven; Boemmels, Juergen; Collaert, Nadine; Horiguchi, Naoto (2020)

    • 3D sequential stacked planar devices featuring low-temperature replacement metal gate junctionless top devices with improved reliability 

      Vandooren, Anne; Franco, Jacopo; Parvais, Bertrand; Wu, Zhicheng; Witters, Liesbeth; Walke, Amey; Li, Waikin; Peng, Lan; Deshpande, Veeresh Vidyadhar; Bufler, Fabian; Rassoul, Nouredine; Hellings, Geert; Jamieson, Geraldine; Inoue, Fumihiro; Verbinnen, Greet; Devriendt, Katia; Teugels, Lieve; Heylen, Nancy; Vecchio, Emma; Tao, Zheng; Rosseel, Erik; Vanherle, Wendy; Hikavyy, Andriy; Chan, BT; Ritzenthaler, Romain; Besnard, Guillaume; Schwarzenbach, Walter; Gaudin, Gweltaz; Radu, Ionut; Nguyen, Bich-Yen; Waldron, Niamh; De Heyn, Vincent; Mocuta, Dan; Collaert, Nadine (2018-11)

    • 3D sequential stacked planar devices on 300 mm wafers featuring replacement metal gate junction-less top devices processed at 525°C with improved reliability 

      Vandooren, Anne; Franco, Jacopo; Parvais, Bertrand; Wu, Zhicheng; Witters, Liesbeth; Walke, Amey; Li, Waikin; Peng, Lan; Deshpande, Veeresh Vidyadhar; Bufler, Fabian; Rassoul, Nouredine; Hellings, Geert; Jamieson, Geraldine; Inoue, Fumihiro; Verbinnen, Greet; Devriendt, Katia; Teugels, Lieve; Heylen, Nancy; Vecchio, Emma; Tao, Zheng; Rosseel, Erik; Vanherle, Wendy; Hikavyy, Andriy; Chan, BT; Ritzenthaler, Romain; Besnard, Guillaume; Schwarzenbach, Walter; Gaudin, Gweltaz; Radu, Ionut; Nguyen, Bich-Yen; Waldron, Niamh; De Heyn, Vincent; Mocuta, Dan; Collaert, Nadine (2018)

    • Acidic cleaning solutions for post InGaAs CMP cleaning 

      Park, Jin-Goo; Purushothaman, Muthukrishnan; Lee, Jung-Hwan; Choi, In-chan; Kim, Hyun-Tae; Teugels, Lieve; Kim, Tae-Gon (2018-04)

    • Alternative metal recess for fully-self-aligned-vias 

      Contino, Antonino; Le, Quoc Toan; Sakamoto, Kei; Schleicher, Filip; Paolillo, Sara; Pacco, Antoine; Kesters, Els; Lorant, Christophe; Murdoch, Gayle; Lariviere, Stephane; Vega Gonzalez, Victor; Versluijs, Janko; Jaenen, Patrick; Teugels, Lieve; van der Veen, Marleen; Jourdan, Nicolas; Ciofi, Ivan; Boccardi, Guillaume; Tokei, Zsolt; Wilson, Chris (2020)

    • An improved CMP process for integration of high mobility channel materials 

      Teugels, Lieve; Ong, Patrick; Usman Ibrahim, Ansar; Delande, Tinne; Bhonsle, Rithu; Siebert, Max; Garcia Romero, Ivan; Struyf, Herbert; Leunissen, Leonardus (2016)

    • An improved CMP process for integration of high mobility channel materials 

      Teugels, Lieve; Ong, Patrick; Ansar, Sheik; Delande, Tinne; Bhonsle, Rithu; Siebert, Max; Garcia Romero, Ivan; Struyf, Herbert; Leunissen, Leonardus (2016)

    • An InGaAs/InP quantum well FinFET using the replacement fin process integrated in an RMG flow on 300mm Si substrates 

      Waldron, Niamh; Merckling, Clement; Guo, Weiming; Ong, Patrick; Teugels, Lieve; Ansar, Sheikh; Tsvetanova, Diana; Sebaai, Farid; van Dorp, Dennis; Milenin, Alexey; Lin, Dennis; Nyns, Laura; Mitard, Jerome; Pourghaderi, Mohammad Ali; Douhard, Bastien; Richard, Olivier; Bender, Hugo; Boccardi, Guillaume; Caymax, Matty; Heyns, Marc; Vandervorst, Wilfried; Barla, Kathy; Collaert, Nadine; Thean, Aaron (2014)

    • An overview of some recent CMP projects at imec 

      Teugels, Lieve; Heylen, Nancy; Leunissen, Peter (2011)

    • Buried metal line compatible with 3D sequential integration for top tier planar devices dynamic Vth tuning and RF shielding applications 

      Vandooren, Anne; Wu, Zhicheng; Khaled, Ahmad; Franco, Jacopo; Parvais, Bertrand; Li, W.; Witters, Liesbeth; Walke, Amey; Peng, Lan; Rassoul, Nouredine; Matagne, Philippe; Jamieson, Geraldine; Inoue, Fumihiro; Nguyen, B.Y.; Debruyn, Haroen; Devriendt, Katia; Teugels, Lieve; Heylen, Nancy; Vecchio, Emma; Zheng, T.; Radisic, Dunja; Rosseel, Erik; Vanherle, Wendy; Hikavyy, Andriy; Chan, BT; Besnard, G.; Schwarzenbach, W.; Gaudin, G.; Radu, Iuliana; Waldron, Niamh; De Heyn, Vincent; Demuynck, Steven; Boemmels, Juergen; Ryckaert, Julien; Collaert, Nadine; Mocuta, Dan (2019)

    • Buried Power Rail Integration for CMOS Scaling beyond the 3 nm Node 

      Gupta, Anshul; Tao, Zheng; Radisic, Dunja; Mertens, Hans; Varela Pedreira, Olalla; Demuynck, Steven; Boemmels, Juergen; Devriendt, Katia; Heylen, Nancy; Wang, Shouhua; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Peter, Antony; Rassoul, Nouredine; Siew, Yong Kong; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; Capogreco, Elena; Mannaert, Geert; Sepulveda Marquez, Alfonso; Dupuy, Emmanuel; Vandersmissen, Kevin; Chehab, Bilal; Murdoch, Gayle; Altamirano Sanchez, Efrain; Biesemans, Serge; Tokei, Zsolt; Dentoni Litta, Eugenio; Horiguchi, Naoto (2022)

    • Buried power rail integration with FinFETs for ultimate CMOS scaling 

      Gupta, Anshul; Varela Pedreira, Olalla; Arutchelvan, Goutham; Zahedmanesh, Houman; Devriendt, Katia; Hanssen, Frederik; Tao, Zheng; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, Noemie; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min-Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Cousserier, Joris; Yakimets, Dmitry; Lazzarino, Frederic; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Jaysankar, Manoj; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Boemmels, Juergen; Demuynck, Steven; Tokei, Zsolt; Horiguchi, Naoto (2020)

    • Buried Power Rail Integration with Si FinFETs for CMOS Scaling beyond the 5 nm Node 

      Gupta, Anshul; Mertens, Hans; Tao, Zheng; Demuynck, Steven; Boemmels, Juergen; Arutchelvan, Goutham; Devriendt, Katia; Varela Pedreira, Olalla; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Zahedmanesh, Houman; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, N.; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Yakimets, Dmitry; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Cousserier, Joris; Jaysankar, Manoj; Lazzarino, Frederic; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Tokei, Zsolt; Horiguchi, Naoto (2020)

    • Buried Power Rail Scaling and Metal Assessment for the 3 nm Node and Beyond 

      Gupta, Anshul; Varela Pedreira, Olalla; Tao, Zheng; Mertens, Hans; Radisic, Dunja; Jourdan, Nicolas; Devriendt, Katia; Heylen, Nancy; Wang, Shouhua; Chehab, Bilal; Jang, Doyoung; Hellings, Geert; Sebaai, Farid; Lorant, Christophe; Teugels, Lieve; Peter, Antony; Chan, BT; Schleicher, Filip; Demonie, Ingrid; Marien, Philippe; Sepulveda Marquez, Alfonso; Richard, Olivier; Nagesh, Nishanth; Lesniewska, Alicja; Lazzarino, Frederic; Ryckaert, Julien; Morin, Pierre; Altamirano Sanchez, Efrain; Murdoch, Gayle; Boemmels, Juergen; Demuynck, Steven; Na, Myung Hee; Tokei, Zsolt; Biesemans, Serge; Dentoni Litta, Eugenio; Horiguchi, Naoto (2020)

    • Capacitor-less, Long-Retention (> 400s) DRAM Cell Paving the Way towards Low-Power and High-Density Monolithic 3D DRAM 

      Belmonte, Attilio; Oh, Hyungrock; Rassoul, Nouredine; Donadio, Gabriele Luca; Mitard, Jerome; Dekkers, Harold; Delhougne, Romain; Subhechha, Subhali; Vaisman Chasin, Adrian; van Setten, Michiel; Kljucar, Luka; Mao, Ming; Puliyalil, Harinarayanan; Pak, Murat; Teugels, Lieve; Tsvetanova, Diana; Banerjee, Kaustuv; Souriau, Laurent; Tokei, Zsolt; Goux, Ludovic; Kar, Gouri Sankar (2020)

    • Carbon nanotube interconnects: electrical characterization of CNT contacts with Cu damascene top contact 

      van der Veen, Marleen; Vereecke, Bart; Huyghebaert, Cedric; Cott, Daire; Masahito, Sugiura; Yusaku, Kashiwagi; Teugels, Lieve; Caluwaerts, Rudy; Beyer, Gerald; Heyns, Marc; Tokei, Zsolt; De Gendt, Stefan (2011)

    • Challenges on surface conditioning in 3D device architectures: triple-gate FinFETs, gate-all-around lateral and vertical nanowire FETs 

      Veloso, Anabela; Paraschiv, Vasile; Vecchio, Emma; Devriendt, Katia; Li, Waikin; Simoen, Eddy; Chan, BT; Tao, Zheng; Rosseel, Erik; Loo, Roger; Milenin, Alexey; Kunert, Bernardette; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; van Dorp, Dennis; Altamirano Sanchez, Efrain; Brus, Stephan; Marien, Philippe; Fleischmann, Claudia; Melkonyan, Davit; Huynh Bao, Trong; Eneman, Geert; Hellings, Geert; Sibaja-Hernandez, Arturo; Matagne, Philippe; Waldron, Niamh; Mocuta, Dan; Collaert, Nadine (2017)