Browsing by author "Demuynck, Steven"
Now showing items 21-40 of 144
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Buried Power Rail Integration for CMOS Scaling beyond the 3 nm Node
Gupta, Anshul; Tao, Zheng; Radisic, Dunja; Mertens, Hans; Varela Pedreira, Olalla; Demuynck, Steven; Boemmels, Juergen; Devriendt, Katia; Heylen, Nancy; Wang, Shouhua; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Peter, Antony; Rassoul, Nouredine; Siew, Yong Kong; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; Capogreco, Elena; Mannaert, Geert; Sepulveda Marquez, Alfonso; Dupuy, Emmanuel; Vandersmissen, Kevin; Chehab, Bilal; Murdoch, Gayle; Altamirano Sanchez, Efrain; Biesemans, Serge; Tokei, Zsolt; Dentoni Litta, Eugenio; Horiguchi, Naoto (2022) -
Buried power rail integration with FinFETs for ultimate CMOS scaling
Gupta, Anshul; Varela Pedreira, Olalla; Arutchelvan, Goutham; Zahedmanesh, Houman; Devriendt, Katia; Hanssen, Frederik; Tao, Zheng; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, Noemie; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min-Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Cousserier, Joris; Yakimets, Dmitry; Lazzarino, Frederic; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Jaysankar, Manoj; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Boemmels, Juergen; Demuynck, Steven; Tokei, Zsolt; Horiguchi, Naoto (2020) -
Buried Power Rail Integration with Si FinFETs for CMOS Scaling beyond the 5 nm Node
Gupta, Anshul; Mertens, Hans; Tao, Zheng; Demuynck, Steven; Boemmels, Juergen; Arutchelvan, Goutham; Devriendt, Katia; Varela Pedreira, Olalla; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Zahedmanesh, Houman; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, N.; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Yakimets, Dmitry; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Cousserier, Joris; Jaysankar, Manoj; Lazzarino, Frederic; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Tokei, Zsolt; Horiguchi, Naoto (2020) -
Buried Power Rail Scaling and Metal Assessment for the 3 nm Node and Beyond
Gupta, Anshul; Varela Pedreira, Olalla; Tao, Zheng; Mertens, Hans; Radisic, Dunja; Jourdan, Nicolas; Devriendt, Katia; Heylen, Nancy; Wang, Shouhua; Chehab, Bilal; Jang, Doyoung; Hellings, Geert; Sebaai, Farid; Lorant, Christophe; Teugels, Lieve; Peter, Antony; Chan, BT; Schleicher, Filip; Demonie, Ingrid; Marien, Philippe; Sepulveda Marquez, Alfonso; Richard, Olivier; Nagesh, Nishanth; Lesniewska, Alicja; Lazzarino, Frederic; Ryckaert, Julien; Morin, Pierre; Altamirano Sanchez, Efrain; Murdoch, Gayle; Boemmels, Juergen; Demuynck, Steven; Na, Myung Hee; Tokei, Zsolt; Biesemans, Serge; Dentoni Litta, Eugenio; Horiguchi, Naoto (2020) -
Channel Length Dependence of PBTI in High-k First RMG Gate Stack Integration Scheme
Parihar, Narendra; Arutchelvan, Goutham; Franco, Jacopo; Baudot, Sylvain; Opdebeeck, Ann; Demuynck, Steven; Arimura, Hiroaki; Ragnarsson, Lars-Ake; Mitard, Jerome; De Heyn, Vincent; Mercha, Abdelkarim (2021) -
Characterization of a FinFET 6T-SRAM cell by tomography
Richard, Olivier; Demuynck, Steven; Veloso, Anabela; Van Marcke, Patricia; Bender, Hugo (2010) -
Characterization of a FinFET 6T-SRAM cell by tomography
Richard, Olivier; Demuynck, Steven; Veloso, Anabela; Van Marcke, Patricia; Bender, Hugo (2009) -
Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies
Huynh Bao, Trong; Yakimets, Dmitry; Ryckaert, Julien; Ciofi, Ivan; Baert, Rogier; Veloso, Anabela; Boemmels, Juergen; Collaert, Nadine; Roussel, Philippe; Demuynck, Steven; Raghavan, Praveen; Mercha, Abdelkarim; Tokei, Zsolt; Verkest, Diederik; Thean, Aaron; Wambacq, Piet (2014-09) -
CMOS integration of high-k/metal gate transistors in diffusion and gate replacement (D&GR) scheme for dynamic random access memory peripheral circuits
Dentoni Litta, Eugenio; Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; O'Sullivan, Barry; Machkaoutsan, Vladimir; Fazan, Pierre; Ji, Yunhyuck; Mannaert, Geert; Lorant, Christophe; Sebaai, Farid; Thiam, Arame; Ercken, Monique; Demuynck, Steven; Horiguchi, Naoto (2018) -
CMOS integration of thermally stable diffusion and gate replacement (D&GR) high-k/metal gate stacks in DRAM periphery transistors
Dentoni Litta, Eugenio; Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; O'Sullivan, Barry; Ji, Yunhyuck; Mannaert, Geert; Lorant, Christophe; Sebaai, Farid; Thiam, Arame; Ercken, Monique; Demuynck, Steven; Horiguchi, Naoto (2017) -
CMOS patterning over high aspect ratio topographies for N10/N7 using spin-on carbon hardmasks
Hopf, Toby; Ercken, Monique; Mannaert, Geert; Kunnen, Eddy; Tao, Zheng; Vandenbroeck, Nadia; Sebaai, Farid; Kikuchi, Yoshiaki; Mertens, Hans; Kubicek, Stefan; Demuynck, Steven; Horiguchi, Naoto (2017) -
CMOS patterning over high-aspect ratio topographies for N10/N7 using spin-on carbon hardmasks
Hopf, Toby; Ercken, Monique; Mannaert, Geert; Kunnen, Eddy; Tao, Zheng; Vandenbroeck, Nadia; Sebaai, Farid; Kikuchi, Yoshiaki; Mertens, Hans; Kubicek, Stefan; Demuynck, Steven; Horiguchi, Naoto (2017) -
Cobalt bottom-up contact and via prefill enabling advanced logic and DRAM technologies
van der Veen, Marleen; Vandersmissen, Kevin; Dictus, Dries; Demuynck, Steven; Liu, Ran; Bin, Xiaomin; Nalla, Praveen; Lesniewska, Alicja; Hall, Laurie; Croes, Kristof; Zhao, Larry; Boemmels, Juergen; Kolics, Artur; Tokei, Zsolt (2015) -
Conduction and Breakdown Mechanisms in Low-k Spacer and Nitride Spacer Dielectric Stacks in Middle of Line Interconnects
Wu, C.; Vaisman Chasin, Adrian; Demuynck, Steven; Horiguchi, Naoto; Croes, Kristof (2020) -
Contact module at dense gate pitch technology challenges
Demuynck, Steven; Mao, Ming; Kunnen, Eddy; Versluijs, Janko; Croes, Kristof; Wu, Chen; Schaekers, Marc; Peter, Antony; Kauerauf, Thomas; Teugels, Lieve; Boemmels, Juergen (2014) -
Contact patterning scheme for organo-siloxane Low-k material as pre-metal dielectric
de Marneffe, Jean-Francois; Le, Quoc Toan; Conard, Thierry; Demuynck, Steven; Struyf, Herbert; Baklanov, Mikhaïl; Boullart, Werner (2005) -
Contacting advanced CMOS devices by local interconnects
Demuynck, Steven (2013) -
Continued scalability of copper/low-k interconnects
Brongersma, Sywert; Carbonell, Laure; Vanstreels, Kris; Iacopi, Francesca; D'Haen, Jan; Zhang, Wenqi; Travaly, Youssef; Demuynck, Steven; Tokei, Zsolt; De Ceuninck, Ward; Maex, Karen (2005) -
Copper seed layer scaling for advanced interconnects: extendibility of I-PVD
Tokei, Zsolt; Demuynck, Steven; Vervoort, Iwan; Mebarki, Bencherki; Mandrekar, T.; Guggilla, S.; Maex, Karen (2003) -
Correlation between barrier integrity and TDDB performance of copper porous low-k interconnects
Tokei, Zsolt; Patz, Matthias; Schmidt, Michael; Iacopi, Francesca; Demuynck, Steven; Maex, Karen (2004)