Browsing by author "De Keersgieter, An"
Now showing items 21-40 of 142
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Band-to-band tunneling off-state leakage in Ge fins and nanowires: effect of quantum confinement
Eneman, Geert; Verhulst, Anne; Smith, Lee; Moroz, Victor; De Keersgieter, An; Mocuta, Anda; Collaert, Nadine; Thean, Aaron (2016) -
Benchmarking SOI and bulk FinFET alternatives for PLANAR CMOS scaling succession
Chiarella, Thomas; Witters, Liesbeth; Mercha, Abdelkarim; Kerner, Christoph; Rakowski, Michal; Ortolland, Claude; Ragnarsson, Lars-Ake; Parvais, Bertrand; De Keersgieter, An; Kubicek, Stefan; Redolfi, Augusto; Vrancken, Christa; Brus, Stephan; Lauwers, Anne; Absil, Philippe; Biesemans, Serge; Hoffmann, Thomas Y. (2010) -
Buried power rail integration with FinFETs for ultimate CMOS scaling
Gupta, Anshul; Varela Pedreira, Olalla; Arutchelvan, Goutham; Zahedmanesh, Houman; Devriendt, Katia; Hanssen, Frederik; Tao, Zheng; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, Noemie; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min-Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Cousserier, Joris; Yakimets, Dmitry; Lazzarino, Frederic; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Jaysankar, Manoj; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Boemmels, Juergen; Demuynck, Steven; Tokei, Zsolt; Horiguchi, Naoto (2020) -
Buried Power Rail Integration with Si FinFETs for CMOS Scaling beyond the 5 nm Node
Gupta, Anshul; Mertens, Hans; Tao, Zheng; Demuynck, Steven; Boemmels, Juergen; Arutchelvan, Goutham; Devriendt, Katia; Varela Pedreira, Olalla; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Zahedmanesh, Houman; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, N.; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Yakimets, Dmitry; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Cousserier, Joris; Jaysankar, Manoj; Lazzarino, Frederic; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Tokei, Zsolt; Horiguchi, Naoto (2020) -
Challenges in scaling of CMOS devices towards 65nm node
Jurczak, Gosia; Veloso, Anabela; Rooyackers, Rita; Augendre, Emmanuel; Mertens, Sofie; Rothschild, Aude; Schaekers, Marc; Lindsay, Richard; Lauwers, Anne; Henson, Kirklen; Severi, Simone; Pollentier, Ivan; De Keersgieter, An (2003-06) -
Channel hot-carrier degradation in short-channel transistors with high-k/metal gate stacks
Amat, Esteve; Kauerauf, Thomas; Degraeve, Robin; De Keersgieter, An; Rodríguez, Rosana; Nafría, Montse; Aymerich, Xavier; Groeseneken, Guido (2009) -
Channel hot-carrier degradation under static stress in short channel transistors with high-k/metal gate stacks
Amat, E.; Kauerauf, Thomas; Degraeve, Robin; De Keersgieter, An; Rodríguez, R.; Nafría, M.; Aymerich, X.; Groeseneken, Guido (2008) -
Characteristics and integration challenges of FinFET-based devices for (Sub-)22nm technology nodes circuit applications
Veloso, Anabela; Van Dal, Mark; Collaert, Nadine; De Keersgieter, An; Witters, Liesbeth; Rooyackers, Rita; Redolfi, Augusto; Brus, Stephan; Duffy, Ray; Pawlak, Bartek; Vellianitis, Georgios; Duriez, Blandine; Merelle, Thomas; Absil, Philippe; Biesemans, Serge; Jurczak, Gosia; Hoffmann, Thomas Y.; Lander, Rob (2009-10) -
Characterization and otimalization of 65nm CMOS technology using scanning spreading resistance microscopy
Eyben, Pierre; De Keersgieter, An; Chramtsov, I.; Fouchier, M.; Janssens, Tom; Vandervorst, Wilfried (2005) -
Combining TCAD and advanced metrology techniques to support device integration towards N3
Eyben, Pierre; De Keersgieter, An; Celano, Umberto; Wouters, Lennaert; Chiarella, Thomas; Ritzenthaler, Romain; Mertens, Hans; Richard, Olivier; Paredis, Kristof; Matagne, Philippe; Mitard, Jerome; Horiguchi, Naoto; Goux, Ludovic (2021) -
Compact Physics Hot-Carrier Degradation Model Valid over a Wide Bias Range
Tyaginov, Stanislav; Bury, Erik; Grill, Alexander; Yu, Zhuoqing; Makarov, Alexander; De Keersgieter, An; Vexler, Mikhail; Vandemaele, Michiel; Wang, Runsheng; Spessot, Alessio; Vaisman Chasin, Adrian; Kaczer, Ben (2023) -
Consistent model for short-channel NMOSFET after hard gate oxide breakdown
Kaczer, Ben; Degraeve, Robin; De Keersgieter, An; Van de Mieroop, Koen; Simons, Veerle; Groeseneken, Guido (2002) -
Consistent model for short-channel nMOSFET post-hard-breakdown characteristics
Kaczer, Ben; Degraeve, Robin; De Keersgieter, An; Van de Mieroop, Koen; Bearda, Twan; Groeseneken, Guido (2001) -
Cost effective FinFET platform for stand alone DRAM 1Y and beyond memory periphery
Spessot, Alessio; Sharan, Neha; Oh, Hyungrock; Ritzenthaler, Romain; Dentoni Litta, Eugenio; Mallik, Arindam; De Keersgieter, An; Parvais, Bertrand; Sherazi, Yasser; Machkaoutsan, Vladimir; Kim, Cheolgyu; Fazan, Pierre; Mocuta, Dan; Mocuta, Anda; Horiguchi, Naoto (2018-01) -
Demonstration of scaled 0.099μm² FinFET 6T-SRAM cell using full-field EUV lithography for (Sub-)22nm node single-patterning technology
Veloso, Anabela; Demuynck, Steven; Ercken, Monique; Goethals, Mieke; Locorotondo, Sabrina; Lazzarino, Frederic; Altamirano Sanchez, Efrain; Huffman, Craig; De Keersgieter, An; Brus, Stephan; Demand, Marc; Struyf, Herbert; De Backer, Johan; Hermans, Jan; Delvaux, Christie; Baudemprez, Bart; Vandeweyer, Tom; Van Roey, Frieda; Baerts, Christina; Goossens, Danny; Dekkers, Harold; Ong, Patrick; Heylen, Nancy; Kellens, Kristof; Volders, Henny; Hikavyy, Andriy; Vrancken, Christa; Rakowski, Michal; Verhaegen, Staf; Dusa, Mircea; Romijn, Leon; Pigneret, Charles; van Dijk, Andre; Schreutelkamp, Rob; Cockburn, Andrew; Gravey, Virginie; Meiling, H.; Hultermans, B.; Lok, S.; Shah, K.; Rajagopalan, R.; Gelatos, J.; Richard, Olivier; Bender, Hugo; Vandenberghe, Geert; Beyer, Gerald; Absil, Philippe; Hoffmann, Thomas Y.; Ronse, Kurt; Biesemans, Serge (2009-12) -
Device modeling in the frame of project ADEQUAT
Rudan, M.; Vecchi, M. C.; Von Schwerin, Andreas; Schoenmaker, Wim; De Keersgieter, An; McCarthy, K.; Mathewson, A.; Klaassen, Dick; Otten, J. A. M.; Jones, S. K.; Metcalfe, J. G. (1996) -
Device scaling model for bulk FinFETs
Medury, Aditya; Mercha, Abdelkarim; Ritzenthaler, Romain; De Keersgieter, An; Chiarella, Thomas; Collaert, Nadine; Bhat, N; Bhat, KN (2012) -
Doping strategies for FinFETs
Pawlak, Bartek; Duffy, Ray; De Keersgieter, An (2008) -
Electrical characteristics of P-type bulk Si fin field-effect transistor using solid-source doping with 1-nm phosphosilicate glass
Kikuchi, Yoshiaki; Chiarella, Thomas; De Roest, David; Blanquart, Timothee; De Keersgieter, An; Kenis, Karine; Peter, Antony; Ong, Patrick; Van Besien, Els; Tao, Zheng; Kim, Min-Soo; Kubicek, Stefan; Chew, Soon Aik; Schram, Tom; Demuynck, Steven; Mocuta, Anda; Mocuta, Dan; Horiguchi, Naoto (2016) -
Electrical TCAD simulation of a germanium pMOSFET technology
Hellings, Geert; Eneman, Geert; Krom, Raymond; De Jaeger, Brice; Mitard, Jerome; De Keersgieter, An; Hoffmann, Thomas Y.; Meuris, Marc; De Meyer, Kristin (2010)