Browsing by author "Rosseel, Erik"
Now showing items 21-40 of 229
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Application of group IV epitaxy in the advanced CMOS fabrication
Hikavyy, Andriy; Porret, Clément; Rosseel, Erik; Vohra, Anurag; Loo, Roger (2018) -
Application of selective epitaxial growth in the sub 20 nm FinFET device fabrication
Hikavyy, Andriy; Rosseel, Erik; Eneman, Geert; Favia, Paola; Loo, Roger (2014) -
Applications of dynamic surface annealing for high-performance Si and Ge based MOS devices
Rosseel, Erik; Everaert, Jean-Luc; Hikavyy, Andriy; Witters, Liesbeth; Mitard, Jerome; Vandervorst, Wilfried (2011) -
Atomic layer deposition of Gd-doped HfO2 thin films
Adelmann, Christoph; Tielens, Hilde; Dewulf, Daan; Hardy, An; Pierreux, Dieter; Swerts, Johan; Rosseel, Erik; Shi, Xiaoping; Van Bael, Marlies; Kittl, Jorge; Van Elshocht, Sven (2010) -
Atomic layer deposition of GdHfOx thin films
Adelmann, Christoph; Pierreux, Dieter; Swerts, Johan; Rosseel, Erik; Shi, Xiaoping; Tielens, Hilde; Kesters, Jurgen; Van Elshocht, Sven; Kittl, Jorge (2009) -
B and Ga Co-Doped Si1-xGex for p-Type Source/Drain Contacts
Rengo, Gianluca; Porret, Clément; Hikavyy, Andriy; Rosseel, Erik; Ayyad, Mustafa; Morris, Richard; Khazaka, Rami; Loo, Roger; Vantomme, Andre (2022) -
Buried metal line compatible with 3D sequential integration for top tier planar devices dynamic Vth tuning and RF shielding applications
Vandooren, Anne; Wu, Zhicheng; Khaled, Ahmad; Franco, Jacopo; Parvais, Bertrand; Li, W.; Witters, Liesbeth; Walke, Amey; Peng, Lan; Rassoul, Nouredine; Matagne, Philippe; Jamieson, Geraldine; Inoue, Fumihiro; Nguyen, B.Y.; Debruyn, Haroen; Devriendt, Katia; Teugels, Lieve; Heylen, Nancy; Vecchio, Emma; Zheng, T.; Radisic, Dunja; Rosseel, Erik; Vanherle, Wendy; Hikavyy, Andriy; Chan, BT; Besnard, G.; Schwarzenbach, W.; Gaudin, G.; Radu, Iuliana; Waldron, Niamh; De Heyn, Vincent; Demuynck, Steven; Boemmels, Juergen; Ryckaert, Julien; Collaert, Nadine; Mocuta, Dan (2019) -
Buried Power Rail Integration for CMOS Scaling beyond the 3 nm Node
Gupta, Anshul; Tao, Zheng; Radisic, Dunja; Mertens, Hans; Varela Pedreira, Olalla; Demuynck, Steven; Boemmels, Juergen; Devriendt, Katia; Heylen, Nancy; Wang, Shouhua; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Peter, Antony; Rassoul, Nouredine; Siew, Yong Kong; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; Capogreco, Elena; Mannaert, Geert; Sepulveda Marquez, Alfonso; Dupuy, Emmanuel; Vandersmissen, Kevin; Chehab, Bilal; Murdoch, Gayle; Altamirano Sanchez, Efrain; Biesemans, Serge; Tokei, Zsolt; Dentoni Litta, Eugenio; Horiguchi, Naoto (2022) -
Buried power rail integration with FinFETs for ultimate CMOS scaling
Gupta, Anshul; Varela Pedreira, Olalla; Arutchelvan, Goutham; Zahedmanesh, Houman; Devriendt, Katia; Hanssen, Frederik; Tao, Zheng; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, Noemie; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min-Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Cousserier, Joris; Yakimets, Dmitry; Lazzarino, Frederic; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Jaysankar, Manoj; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Boemmels, Juergen; Demuynck, Steven; Tokei, Zsolt; Horiguchi, Naoto (2020) -
Buried Power Rail Integration with Si FinFETs for CMOS Scaling beyond the 5 nm Node
Gupta, Anshul; Mertens, Hans; Tao, Zheng; Demuynck, Steven; Boemmels, Juergen; Arutchelvan, Goutham; Devriendt, Katia; Varela Pedreira, Olalla; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Zahedmanesh, Houman; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, N.; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Yakimets, Dmitry; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Cousserier, Joris; Jaysankar, Manoj; Lazzarino, Frederic; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Tokei, Zsolt; Horiguchi, Naoto (2020) -
C atom distribution in Si:C and Si:C:P epitaxial layers studied using Raman spectroscopy
Dhayalan, Sathish Kumar; Nuytten, Thomas; Loo, Roger; Rosseel, Erik; Hikavyy, Andriy; Shimura, Yosuke; Vandervorst, Wilfried (2015-05) -
Carbon-related defects in Si:C/silicon heterostructures assessed by deep-level transient spectroscopy
Simoen, Eddy; Dhayalan, Sathish Kumar; Hikavyy, Andriy; Loo, Roger; Rosseel, Erik; Vrielinck, Henk; Lauwaert, Johan (2017) -
Catalyst assisted low temperature pre epitaxial cleaning for Si and SiGe surfaces
Dhayalan, Sathish Kumar; Loo, Roger; Hikavyy, Andriy; Rosseel, Erik; Wostyn, Kurt; Kenis, Karine; Shimura, Yosuke; Profijt, Harald; Maes, Jan; Douhard, Bastien; Vandervorst, Wilfried (2015) -
Challenges and opportunities of vertical FET devices using 3D circuit design layouts
Veloso, Anabela; Huynh Bao, Trong; Rosseel, Erik; Paraschiv, Vasile; Devriendt, Katia; Vecchio, Emma; Delvaux, Christie; Chan, BT; Ercken, Monique; Tao, Zheng; Li, Waikin; Altamirano Sanchez, Efrain; Versluijs, Janko; Brus, Stephan; Matagne, Philippe; Waldron, Niamh; Ryckaert, Julien; Mocuta, Dan; Collaert, Nadine (2016) -
Challenges on surface conditioning in 3D device architectures: triple-gate FinFETs, gate-all-around lateral and vertical nanowire FETs
Veloso, Anabela; Paraschiv, Vasile; Vecchio, Emma; Devriendt, Katia; Li, Waikin; Simoen, Eddy; Chan, BT; Tao, Zheng; Rosseel, Erik; Loo, Roger; Milenin, Alexey; Kunert, Bernardette; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; van Dorp, Dennis; Altamirano Sanchez, Efrain; Brus, Stephan; Marien, Philippe; Fleischmann, Claudia; Melkonyan, Davit; Huynh Bao, Trong; Eneman, Geert; Hellings, Geert; Sibaja-Hernandez, Arturo; Matagne, Philippe; Waldron, Niamh; Mocuta, Dan; Collaert, Nadine (2017) -
Challenges on surface conditioning in 3D device architectures: triple-gate finFETs, gate-all-around lateral and vertical nanowireFETs
Veloso, Anabela; Paraschiv, Vasile; Vecchio, Emma; Devriendt, Katia; Li, Waikin; Simoen, Eddy; Chan, BT; Tao, Zheng; Rosseel, Erik; Loo, Roger; Milenin, Alexey; Kunert, Bernardette; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; van Dorp, Dennis; Altamirano Sanchez, Efrain; Brus, Stephan; Marien, Philippe; Sibaja-Hernandez, Arturo; Matagne, Philippe; Waldron, Niamh; Mocuta, Dan; Collaert, Nadine (2017) -
Characterisation and integration feasibility of JSR's low-k dielectric LKD-5109
Das, Arabinda; Kokubo, Terukazu; Furukawa, Yukiko; Struyf, Herbert; Vos, Ingrid; Sijmus, Bram; Iacopi, Francesca; Van Aelst, Joke; Le, Quoc Toan; Carbonell, Laure; Brongersma, Sywert; Maenhoudt, Mireille; Tokei, Zsolt; Vervoort, Iwan; Sleeckx, Erik; Stucchi, Michele; Schaekers, Marc; Boullart, Werner; Rosseel, Erik; Van Hove, Marleen; Vanhaelemeersch, Serge; Shiota, A.; Maex, Karen (2002) -
Characterization of epitaxial Si:C:P and SI:P layers for source/drain formation in advanced bulk FinFETs
Rosseel, Erik; Profijt, Harald; Hikavyy, Andriy; Tolle, John; Kubicek, Stefan; Mannaert, Geert; L'abbe, Caroline; Wostyn, Kurt; Horiguchi, Naoto; Clarysse, Trudo; Parmentier, Brigitte; Dhayalan, Sathish Kumar; Bender, Hugo; Maes, Jan; Mehta, Sandeep; Loo, Roger (2014-10) -
Characterization of epitaxial Si:C:P and Si:P layers for source/drain formation in advanced bulk finFETs
Rosseel, Erik; Profijt, Harald; Hikavyy, Andriy; Tolle, John; Kubicek, Stefan; Mannaert, Geert; L'abbe, Caroline; Wostyn, Kurt; Horiguchi, Naoto; Clarysse, Trudo; Parmentier, Brigitte; Dhayalan, Sathish Kumar; Bender, Hugo; Maes, Jan Willem; Loo, Roger (2014-10) -
Characterization of highly doped Si:P, Si:As and Si:P:As epi layers for source/drain epitaxy
Rosseel, Erik; Tirrito, Matteo; Porret, Clément; Douhard, Bastien; Meersschaut, Johan; Hikavyy, Andriy; Loo, Roger; Horiguchi, Naoto; Pourtois, Geoffrey; Nakazaki, Nobuya; Tolle, John (2019)