Browsing by author "Chan, BT"
Now showing items 21-40 of 139
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Buried Power Rail Integration for CMOS Scaling beyond the 3 nm Node
Gupta, Anshul; Tao, Zheng; Radisic, Dunja; Mertens, Hans; Varela Pedreira, Olalla; Demuynck, Steven; Boemmels, Juergen; Devriendt, Katia; Heylen, Nancy; Wang, Shouhua; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Peter, Antony; Rassoul, Nouredine; Siew, Yong Kong; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; Capogreco, Elena; Mannaert, Geert; Sepulveda Marquez, Alfonso; Dupuy, Emmanuel; Vandersmissen, Kevin; Chehab, Bilal; Murdoch, Gayle; Altamirano Sanchez, Efrain; Biesemans, Serge; Tokei, Zsolt; Dentoni Litta, Eugenio; Horiguchi, Naoto (2022) -
Buried power rail integration with FinFETs for ultimate CMOS scaling
Gupta, Anshul; Varela Pedreira, Olalla; Arutchelvan, Goutham; Zahedmanesh, Houman; Devriendt, Katia; Hanssen, Frederik; Tao, Zheng; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, Noemie; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min-Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Cousserier, Joris; Yakimets, Dmitry; Lazzarino, Frederic; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Jaysankar, Manoj; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Boemmels, Juergen; Demuynck, Steven; Tokei, Zsolt; Horiguchi, Naoto (2020) -
Buried Power Rail Integration with Si FinFETs for CMOS Scaling beyond the 5 nm Node
Gupta, Anshul; Mertens, Hans; Tao, Zheng; Demuynck, Steven; Boemmels, Juergen; Arutchelvan, Goutham; Devriendt, Katia; Varela Pedreira, Olalla; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Zahedmanesh, Houman; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, N.; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Yakimets, Dmitry; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Cousserier, Joris; Jaysankar, Manoj; Lazzarino, Frederic; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Tokei, Zsolt; Horiguchi, Naoto (2020) -
Buried Power Rail Scaling and Metal Assessment for the 3 nm Node and Beyond
Gupta, Anshul; Varela Pedreira, Olalla; Tao, Zheng; Mertens, Hans; Radisic, Dunja; Jourdan, Nicolas; Devriendt, Katia; Heylen, Nancy; Wang, Shouhua; Chehab, Bilal; Jang, Doyoung; Hellings, Geert; Sebaai, Farid; Lorant, Christophe; Teugels, Lieve; Peter, Antony; Chan, BT; Schleicher, Filip; Demonie, Ingrid; Marien, Philippe; Sepulveda Marquez, Alfonso; Richard, Olivier; Nagesh, Nishanth; Lesniewska, Alicja; Lazzarino, Frederic; Ryckaert, Julien; Morin, Pierre; Altamirano Sanchez, Efrain; Murdoch, Gayle; Boemmels, Juergen; Demuynck, Steven; Na, Myung Hee; Tokei, Zsolt; Biesemans, Serge; Dentoni Litta, Eugenio; Horiguchi, Naoto (2020) -
Capture probability of assembly defects in 14 nm half-pitch line/space DSA patterns
Pathangi Sriraman, Hari; Chan, BT; Van Look, Lieve; Vandenbroeck, Nadia; Van Den Heuvel, Dieter; Cross, Andrew; Hong, Sung Eun; Nafus, Kathleen; D'Urzo, Lucia; Gronheid, Roel (2015) -
Challenges and opportunities of vertical FET devices using 3D circuit design layouts
Veloso, Anabela; Huynh Bao, Trong; Rosseel, Erik; Paraschiv, Vasile; Devriendt, Katia; Vecchio, Emma; Delvaux, Christie; Chan, BT; Ercken, Monique; Tao, Zheng; Li, Waikin; Altamirano Sanchez, Efrain; Versluijs, Janko; Brus, Stephan; Matagne, Philippe; Waldron, Niamh; Ryckaert, Julien; Mocuta, Dan; Collaert, Nadine (2016) -
Challenges and solutions of replacement metal gate patterning to enable gate-all-around device scaling
Oniki, Yusuke; Ragnarsson, Lars-Ake; Hideaki, Iino; Cott, Daire; Chan, BT; Sebaai, Farid; Hopf, Toby; Dekkers, Harold; Dentoni Litta, Eugenio; Altamirano Sanchez, Efrain; Holsteyns, Frank; Horiguchi, Naoto (2021) -
Challenges for line width / line edge roughness (LWR/lER) improvement in Directed Self-Assembly (DSA) advanced patterning
Chan, BT; Pathangi Sriraman, Hari; Singh, Arjun; El Otell, Ziad; Gronheid, Roel; de Marneffe, Jean-Francois; Piumi, Daniele (2015) -
Challenges on surface conditioning in 3D device architectures: triple-gate FinFETs, gate-all-around lateral and vertical nanowire FETs
Veloso, Anabela; Paraschiv, Vasile; Vecchio, Emma; Devriendt, Katia; Li, Waikin; Simoen, Eddy; Chan, BT; Tao, Zheng; Rosseel, Erik; Loo, Roger; Milenin, Alexey; Kunert, Bernardette; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; van Dorp, Dennis; Altamirano Sanchez, Efrain; Brus, Stephan; Marien, Philippe; Fleischmann, Claudia; Melkonyan, Davit; Huynh Bao, Trong; Eneman, Geert; Hellings, Geert; Sibaja-Hernandez, Arturo; Matagne, Philippe; Waldron, Niamh; Mocuta, Dan; Collaert, Nadine (2017) -
Challenges on surface conditioning in 3D device architectures: triple-gate finFETs, gate-all-around lateral and vertical nanowireFETs
Veloso, Anabela; Paraschiv, Vasile; Vecchio, Emma; Devriendt, Katia; Li, Waikin; Simoen, Eddy; Chan, BT; Tao, Zheng; Rosseel, Erik; Loo, Roger; Milenin, Alexey; Kunert, Bernardette; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; van Dorp, Dennis; Altamirano Sanchez, Efrain; Brus, Stephan; Marien, Philippe; Sibaja-Hernandez, Arturo; Matagne, Philippe; Waldron, Niamh; Mocuta, Dan; Collaert, Nadine (2017) -
Characterization of patterned porous dielectrics after plasma patterning and subsequent wet processing
Le, Quoc Toan; Kesters, Els; Decoster, Stefan; Chan, BT; Holsteyns, Frank; De Gendt, Stefan (2015) -
Characterization of patterned porous low-k dielectrics: surface sealing and residue removal by wet processing/cleaning
Le, Quoc Toan; Kesters, Els; Decoster, Stefan; Chan, BT; Nguyen, Mai Phuong; Conard, Thierry; Vanleenhove, Anja; Holsteyns, Frank; De Gendt, Stefan (2016) -
Comparison of Electrical Performance of Co-Integrated Forksheets and Nanosheets Transistors for the 2nm Technological Node and Beyond
Ritzenthaler, Romain; Mertens, Hans; Eneman, Geert; Simoen, Eddy; Bury, Erik; Eyben, Pierre; Bufler, Fabian; Oniki, Yusuke; Briggs, Basoene; Chan, BT; Hikavyy, Andriy; Mannaert, Geert; Parvais, Bertrand; Vaisman Chasin, Adrian; Mitard, Jerome; Dentoni Litta, Eugenio; Samavedam, Sri; Horiguchi, Naoto (2021) -
Contact hole CD uniformity repair through directed self-assembly of cylindrical phase block copolymers
Gronheid, Roel; Singh, Arjun; Chan, BT; Rincon Delgadillo, Paulina; Nealey, Paul; Younkin, Todd; Romo Negreira, Ainhoa; Somervell, Mark; Tahara, Shigeru; Nafus, Kathleen (2012) -
Contact hole multiplication using grapho-epitaxy directed self-assembly: process choices, template optimization, and placement accuracy
Bekaert, Joost; Gronheid, Roel; MKuppuswamy, Vijaya Kumar; Doise, Jan; Chan, BT; Vandenberghe, Geert; Sayan, Safak; Cao, Yi; Her, YoungJun (2014) -
Contact hole multiplication using grapho-epitaxy directed self-assembly: process choices, template optimization, and placement accuracy
Bekaert, Joost; Doise, Jan; MKuppuswamy, Vijaya Kumar; Chan, BT; Gronheid, Roel; Vandenberghe, Geert; Cao, Yi; Her, YoungJun (2014) -
Contact hole multiplication using grapho-epitaxy directed self-assembly: process choices, template optimization, and placement accuracy
Bekaert, Joost; Doise, Jan; MKuppuswamy, Vijaya Kumar; Gronheid, Roel; Chan, BT; Vandenberghe, Geert; Cao, Yi; Her, YoungJun (2014) -
Controlling placement error and dimensional variability in templated DSA
Boeckx, Carolien; Doise, Jan; Bekaert, Joost; Chan, BT; Gronheid, Roel; De Gendt, Stefan (2016) -
Conversion of a patterned organic resist into a high performance inoriganic hard mask for high resolution pattern transfer
de Marneffe, Jean-Francois; Chan, BT; Spieser, Martin; Vereecke, Guy; Naumov, Sergej; Vanhaeren, Danielle; Knoll, Armin; Wolf, Heiko (2018) -
Defect capture sensitivity in 14 nm half-pitch line/space DSA patterns
Pathangi Sriraman, Hari; Gronheid, Roel; Van Den Heuvel, Dieter; Rincon Delgadillo, Paulina; Chan, BT; Van Look, Lieve; Bayana, Hareen; Cao, Yi; Her, YoungJun; Lin, Guanyang; Parnell, Doni; Nafus, Kathleen; Somervell, Mark; Harukawa, Ryoto; Chikashi, Ito; Nagaswami, Venkat; D'Urzo, Lucia; Nealey, Paul (2014)