Browsing Conference contributions by author "Nackaerts, Axel"

A 0.314mm2 6T-SRAM cell built with tall triple-gate devices for 45nm node applications using 0.75NA 193nm lithography

Nackaerts, Axel; Ercken, Monique; Demuynck, Steven; Lauwers, Anne; Baerts, Christina; Bender, Hugo; Boullart, Werner; Collaert, Nadine; Degroote, Bart; Delvaux, Christie; de Marneffe, Jean-Francois; Dixit, Abhisek; De Meyer, Kristin; Hendrickx, Eric; Heylen, Nancy; Jaenen, Patrick; Laidler, David; Locorotondo, Sabrina; Maenhoudt, Mireille; Moelants, Myriam; Pollentier, Ivan; Ronse, Kurt; Rooyackers, Rita; Van Aelst, Joke; Vandenberghe, Geert; Vandervorst, Wilfried; Vandeweyer, Tom; Vanhaelemeersch, Serge; Van Hove, Marleen; Van Olmen, Jan; Verhaegen, Staf; Versluijs, Janko; Vrancken, Christa; Wiaux, Vincent; Jurczak, Gosia; Biesemans, Serge (2004-12)

A low-power multi-gate FET CMOS technology with 13.9ps inverter delay, large-scale integrated high performance digital circuits and SRAM

von Arnim, Klaus; Augendre, Emmanuel; Pacha, C.; Schulz, Thomas; San, Kemal Tamer; Bauer, F.; Nackaerts, Axel; Rooyackers, Rita; Vandeweyer, Tom; Degroote, Bart; Collaert, Nadine; Dixit, Abhisek; Singanamalla, Raghunath; Xiong, W.; Marshall, A.; Cleavelin, C.R.; Schrüfer, K.; Jurczak, Gosia (2007)

Challenges in patterning 45nm node multiple-gate devices and SRAM cells

Ercken, Monique; Delvaux, Christie; Baerts, Christina; Locorotondo, Sabrina; Degroote, Bart; Wiaux, Vincent; Nackaerts, Axel; Rooyackers, Rita; Verhaegen, Staf; Pollentier, Ivan (2004)

Dose enhancement due to interconnects in deep-submicron MOSFETs exposed to X-rays

Griffoni, Alessio; Silvestri, Marco; Gerardin, Simone; Meneghesso, Gaudenzio; Paccagnella, Alessandro; Kaczer, Ben; de Potter de ten Broeck, Muriel; Verbeeck, Rita; Nackaerts, Axel (2008)

First observation of FinFET specific mismatch behavior and optimization guidelines for SRAM scaling

Merelle, Thomas; Curatola, Gilberto; Nackaerts, Axel; Collaert, Nadine; Van Dal, Mark; Doornbos, Gerben; Doorn, T.S.; Christie, Phillip; Vellianitis, Georgios; Duriez, Blandine; Duffy, Ray; Pawlak, Bartek; Voogt, F.C.; Rooyackers, Rita; Witters, Liesbeth; Jurczak, Gosia; Lander, Rob (2008)

FUSI specific yield monitoring enabling improved circuit performance and fast feedback to production

Chiarella, Thomas; Rosmeulen, Maarten; Tigelaar, Howard; Kerner, Christoph; Nackaerts, Axel; Ramos, Javier; Lauwers, Anne; Veloso, Anabela; Jurczak, Gosia; Rothschild, Aude; Witters, Liesbeth; Yu, HongYu; Kittl, Jorge; Verbeeck, Rita; de Potter de ten Broeck, Muriel; Debusschere, Ingrid; Absil, Philippe; Biesemans, Serge; Hoffmann, Thomas Y. (2007-03)

Integration of tall triple-gate devices with inserted TaxNy gate in a 0.274μm² 6T-SRAM cell and advanced CMOS logic circuits

Witters, Liesbeth; Collaert, Nadine; Nackaerts, Axel; Demand, Marc; Demuynck, Steven; Delvaux, Christie; Lauwers, Anne; Baerts, Christina; Beckx, Stephan; Boullart, Werner; Brus, Stephan; Degroote, Bart; de Marneffe, Jean-Francois; Dixit, Abhisek; De Meyer, Kristin; Ercken, Monique; Goodwin, Michael; Hendrickx, Eric; Heylen, Nancy; Jaenen, Patrick; Laidler, David; Leray, Philippe; Locorotondo, Sabrina; Maenhoudt, Mireille; Moelants, Myriam; Pollentier, Ivan; Ronse, Kurt; Rooyackers, Rita; Van Aelst, Joke; Vandenberghe, Geert; Vandeweyer, Tom; Vanhaelemeersch, Serge; Van Hove, Marleen; Van Olmen, Jan; Verhaegen, Staf; Versluijs, Janko; Vrancken, Christa; Wiaux, Vincent; Willems, Patrick; Wouters, Johan M. D.; Jurczak, Gosia; Biesemans, Serge (2005)

Layout options for stability tuning of SRAM cells in multi-gate=FET technologies

Bauer, F.; von Arnim, Klaus; Pacha, C.; Schultz, T.; Fulde, M.; Nackaerts, Axel; Jurczak, Gosia; Xiong, W.; San, K.T.; Cleavelin, C.R.; Schrüfer, K.; Georgakos, G.; Schmitt-Landsiedel, D. (2007)

Litho variations and their impact on the electrical yield of a 32nm node 6T-SRAM cell

Verhaegen, Staf; Cosemans, Stefan; Dusa, Mircea; Marchal, Pol; Nackaerts, Axel; Vandenberghe, Geert; Dehaene, Wim (2008-02)

Lithography and yield sensitivity analysis of SRAM scaling for the 32-nm node.

Nackaerts, Axel; Verhaegen, Staf; Dusa, Mircea; Kattouw, Hans; van Bilsen, Frank; Biesemans, Serge; Vandenberghe, Geert (2007)

Low-voltage 6T FinFET SRAM cell with high SNM using HfSiON/TiN gate stack, fin widths down to 10nm and 30nm gate length

Collaert, Nadine; von Arnim, Klaus; Rooyackers, Rita; Vandeweyer, Tom; Mercha, Abdelkarim; Parvais, Bertrand; Witters, Liesbeth; Nackaerts, Axel; Altamirano Sanchez, Efrain; Demand, Marc; Hikavyy, Andriy; Demuynck, Steven; Devriendt, Katia; Bauer, F.; Ferain, Isabelle; Veloso, Anabela; De Meyer, Kristin; Biesemans, Serge; Jurczak, Gosia (2008)

Multi-gate devices for the 32nm technology node and beyond

Collaert, Nadine; De Keersgieter, An; Dixit, Abhisek; Ferain, Isabelle; Lai, Li-Shyue; Lenoble, Damien; Mercha, Abdelkarim; Nackaerts, Axel; Pawlak, Bartek; Rooyackers, Rita; Schulz, Thomas; San, Kemal Tamer; Son, Nak Jin; Van Dal, Mark; Verheyen, Peter; von Arnim, Klaus; Witters, Liesbeth; De Meyer, Kristin; Biesemans, Serge; Jurczak, Gosia (2007)