Redefining 2-Level Semi-Damascene Interconnect Technology: Benchmarking three different Fully Self-aligned Via options

Abstract

This study highlights the effectiveness of a novel two-metal-level semi-damascene integration approach using fully self-aligned pillar-vias (FSAV) for interconnects ranging from 18 to 26 nm metal pitch. We employ EUV-SADP-SIM patterning scheme and direct metal etch of Ru to demonstrate the proof of concept on 300 mm wafers. This integration gives lower via resistance than the previously reported schemes and promises lower capacitance. Furthermore, it significantly widens the via litho and etch process window, making it more attractive for advanced semiconductor manufacturing.