Browsing by Author "Shah, Kavita"

300 mm-wafer characterization of ruthenium area-selective deposition in nanoscale line-space and hole patterns

Impact of LER on BEOL dielectric reliability: a quantitative model and experimental validation

Implementation of Ru based barriers in 50 nm half pitch single damascene Cu/SiCOH (k=2.5) structures

Implementation of Ru based barriers in 50 nm half pitch single damascene Cu/SiCOH (k=2.5) structures

Integration of 20nm half pitch single damascene copper trenches by spacer-defined double patterning (SDDP) on metal hard mask (MHM)

Manufacturable processes for =32-nm-node CMOS enhancement by synchronous optimization of strain-engineered channel and external parasitic resistances

Metallization of sub- 30 nm Interconnects: Comparison of different liner/seed combinations

Metallization options for sub- 30 nm interconnects: comparison of Cu and W metallizations

Plasma enhanced atomic layer deposition of ruthenium ultra-thin films for advanced metallization

Plasma halogenated amorphous carbon as growth inhibiting layer for area-selective deposition of titanium oxide

Scalability of plasma enhanced atomic layer deposited ruthenium films for interconnect applications

Scatterometry and X-ray metrology for in-line control of spin-transfer torque magnetic random access memory (STT-MRAM) devices

Spacer defined double patterning for 20nm half pitch interconnect damascene structures