Browsing by author "Dentoni Litta, Eugenio"
Now showing items 1-20 of 61
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3D sequential CMOS top tier devices demonstration using a low temperature Smart Cu (TM) Si layer transfer
Besnard, Guillaume; Radu, Ionut; Vandooren, Anne; Wu, Zhicheng; Franco, Jacopo; Li, Waikin; Arimura, Hiroaki; Mannaert, Geert; Rosseel, Erik; Hikavyy, Andriy; Dentoni Litta, Eugenio; Horiguchi, Naoto (2021) -
80 nm tall thermally stable cost effective FinFETs for advanced dynamic random access memory periphery devices for artificial intelligence/machine learning and automotive applications
Spessot, Alessio; Ritzenthaler, Romain; Dentoni Litta, Eugenio; Dupuy, Emmanuel; O'Sullivan, Barry; Bastos, Joao; Capogreco, Elena; Miyaguchi, Kenichi; Machkaoutsan, Vladimir; Yoon, Younggwang; Fazan, Pierre; Horiguchi, Naoto (2021) -
80nm tall thermally stable cost effective FinFETs for advanced DRAM periphery devices for AI/ML and Automotive applications
Spessot, Alessio; Ritzenthaler, Romain; Dentoni Litta, Eugenio; Dupuy, Emmanuel; O'Sullivan, Barry; Bastos, Joao; Capogreco, Elena; Miyaguchi, Kenichi; Machkaoutsan, Vladimir; Yoon, Younggwang; Fazan, Pierre; Horiguchi, Naoto (2020) -
Automated voids detection for metal filled trenches with bottom CD of 10nm
Hosseini, Maryam; Martinez Alanis, Gerardo Tadeo; van der Veen, Marleen; Jourdan, Nicolas; Dentoni Litta, Eugenio; Horiguchi, Naoto (2021) -
Bias Temperature Instability (BTI) of High-Voltage Devices for Memory Periphery
Bastos, Joao; O'Sullivan, Barry; Franco, Jacopo; Tyaginov, Stanislav; Truijen, Brecht; Vaisman Chasin, Adrian; Degraeve, Robin; Kaczer, Ben; Ritzenthaler, Romain; Capogreco, Elena; Dentoni Litta, Eugenio; Spessot, Alessio; Higashi, Yusuke; Yoon, Younggwang; Machkaoutsan, Vladimir; Fazan, Pierre; Horiguchi, Naoto (2022) -
Buried Power Rail Integration for CMOS Scaling beyond the 3 nm Node
Gupta, Anshul; Tao, Zheng; Radisic, Dunja; Mertens, Hans; Varela Pedreira, Olalla; Demuynck, Steven; Boemmels, Juergen; Devriendt, Katia; Heylen, Nancy; Wang, Shouhua; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Peter, Antony; Rassoul, Nouredine; Siew, Yong Kong; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; Capogreco, Elena; Mannaert, Geert; Sepulveda Marquez, Alfonso; Dupuy, Emmanuel; Vandersmissen, Kevin; Chehab, Bilal; Murdoch, Gayle; Altamirano Sanchez, Efrain; Biesemans, Serge; Tokei, Zsolt; Dentoni Litta, Eugenio; Horiguchi, Naoto (2022) -
Buried power rail integration with FinFETs for ultimate CMOS scaling
Gupta, Anshul; Varela Pedreira, Olalla; Arutchelvan, Goutham; Zahedmanesh, Houman; Devriendt, Katia; Hanssen, Frederik; Tao, Zheng; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, Noemie; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min-Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Cousserier, Joris; Yakimets, Dmitry; Lazzarino, Frederic; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Jaysankar, Manoj; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Boemmels, Juergen; Demuynck, Steven; Tokei, Zsolt; Horiguchi, Naoto (2020) -
Buried Power Rail Integration with Si FinFETs for CMOS Scaling beyond the 5 nm Node
Gupta, Anshul; Mertens, Hans; Tao, Zheng; Demuynck, Steven; Boemmels, Juergen; Arutchelvan, Goutham; Devriendt, Katia; Varela Pedreira, Olalla; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Zahedmanesh, Houman; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, N.; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Yakimets, Dmitry; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Cousserier, Joris; Jaysankar, Manoj; Lazzarino, Frederic; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Tokei, Zsolt; Horiguchi, Naoto (2020) -
Buried Power Rail Metal exploration towards the 1 nm Node
Gupta, Anshul; Radisic, Dunja; Maes, J.W.; Varela Pedreira, Olalla; Soulie, Jean-Philippe; Jourdan, Nicolas; Mertens, Hans; Bandyopadhyay, Sudip; Le, Quoc Toan; Pacco, Antoine; Heylen, Nancy; Vandersmissen, Kevin; Devriendt, Katia; Zhu, C.; Datta, S.; Sebaai, Farid; Wang, S.; Mousa, M.; Lee, J.; Geypen, Jef; De Wachter, Bart; Chehab, Bilal; Salahuddin, Shairfe Muhammad; Murdoch, Gayle; Biesemans, Serge; Tokei, Zsolt; Dentoni Litta, Eugenio; Horiguchi, Naoto (2021) -
Buried Power Rail Scaling and Metal Assessment for the 3 nm Node and Beyond
Gupta, Anshul; Varela Pedreira, Olalla; Tao, Zheng; Mertens, Hans; Radisic, Dunja; Jourdan, Nicolas; Devriendt, Katia; Heylen, Nancy; Wang, Shouhua; Chehab, Bilal; Jang, Doyoung; Hellings, Geert; Sebaai, Farid; Lorant, Christophe; Teugels, Lieve; Peter, Antony; Chan, BT; Schleicher, Filip; Demonie, Ingrid; Marien, Philippe; Sepulveda Marquez, Alfonso; Richard, Olivier; Nagesh, Nishanth; Lesniewska, Alicja; Lazzarino, Frederic; Ryckaert, Julien; Morin, Pierre; Altamirano Sanchez, Efrain; Murdoch, Gayle; Boemmels, Juergen; Demuynck, Steven; Na, Myung Hee; Tokei, Zsolt; Biesemans, Serge; Dentoni Litta, Eugenio; Horiguchi, Naoto (2020) -
Buried power SRAM DTCO and system-level benchmarking in N3
Salahuddin, Shairfe Muhammad; Perumkunnil, Manu; Dentoni Litta, Eugenio; Gupta, Anshul; Weckx, Pieter; Ryckaert, Julien; Na, Myung Hee; Spessot, Alessio (2020) -
Can we optimize the gate oxide quality of DRAM input/output pMOSFETs by a post-deposition treatment?
Simoen, Eddy; O'Sullivan, Barry; Ritzenthaler, Romain; Dentoni Litta, Eugenio; Schram, Tom; Horiguchi, Naoto; Claeys, Cor (2019) -
Challenges and solutions of replacement metal gate patterning to enable gate-all-around device scaling
Oniki, Yusuke; Ragnarsson, Lars-Ake; Hideaki, Iino; Cott, Daire; Chan, BT; Sebaai, Farid; Hopf, Toby; Dekkers, Harold; Dentoni Litta, Eugenio; Altamirano Sanchez, Efrain; Holsteyns, Frank; Horiguchi, Naoto (2021) -
CMOS integration of high-k/metal gate transistors in diffusion and gate replacement (D&GR) scheme for dynamic random access memory peripheral circuits
Dentoni Litta, Eugenio; Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; O'Sullivan, Barry; Machkaoutsan, Vladimir; Fazan, Pierre; Ji, Yunhyuck; Mannaert, Geert; Lorant, Christophe; Sebaai, Farid; Thiam, Arame; Ercken, Monique; Demuynck, Steven; Horiguchi, Naoto (2018) -
CMOS integration of thermally stable diffusion and gate replacement (D&GR) high-k/metal gate stacks in DRAM periphery transistors
Dentoni Litta, Eugenio; Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; O'Sullivan, Barry; Ji, Yunhyuck; Mannaert, Geert; Lorant, Christophe; Sebaai, Farid; Thiam, Arame; Ercken, Monique; Demuynck, Steven; Horiguchi, Naoto (2017) -
Comparison of Electrical Performance of Co-Integrated Forksheets and Nanosheets Transistors for the 2nm Technological Node and Beyond
Ritzenthaler, Romain; Mertens, Hans; Eneman, Geert; Simoen, Eddy; Bury, Erik; Eyben, Pierre; Bufler, Fabian; Oniki, Yusuke; Briggs, Basoene; Chan, BT; Hikavyy, Andriy; Mannaert, Geert; Parvais, Bertrand; Vaisman Chasin, Adrian; Mitard, Jerome; Dentoni Litta, Eugenio; Samavedam, Sri; Horiguchi, Naoto (2021) -
Cost effective FinFET platform for stand alone DRAM 1Y and beyond memory periphery
Spessot, Alessio; Sharan, Neha; Oh, Hyungrock; Ritzenthaler, Romain; Dentoni Litta, Eugenio; Mallik, Arindam; De Keersgieter, An; Parvais, Bertrand; Sherazi, Yasser; Machkaoutsan, Vladimir; Kim, Cheolgyu; Fazan, Pierre; Mocuta, Dan; Mocuta, Anda; Horiguchi, Naoto (2018-01) -
Dipole-First Gate Stack as a Scalable and Thermal Budget Flexible Multi-Vt Solution for Nanosheet/CFET Devices
Arimura, Hiroaki; Ragnarsson, Lars-Ake; Oniki, Yusuke; Franco, Jacopo; Vandooren, Anne; Brus, Stephan; Leonhardt, A.; Sippola, P.; Ivanova, T.; Verni, G. Alessio; Chang, R-J; Xie, Q.; Givens, M.; Mitard, Jerome; Biesemans, Serge; Dentoni Litta, Eugenio; Horiguchi, Naoto (2021) -
Disruptive Technology Elements, and Rapid and Accurate Block-Level Performance Evaluation for 3nm and Beyond
Na, Myung Hee; Jang, Doyoung; Baert, Rogier; Sarkar, Satadru; Patli, Sudhir; Zografos, Odysseas; Chehab, Bilal; Spessot, Alessio; Sisto, Giuliano; Schuddinck, Pieter; Mertens, Hans; Oniki, Yusuke; Hellings, Geert; Dentoni Litta, Eugenio; Ryckaert, Julien; Horiguchi, Naoto (2021) -
Enabling Logic with Backside Connectivity via n-TSVs and its Potential as a Scaling Booster
Veloso, Anabela; Jourdain, Anne; Hiblot, Gaspard; Schleicher, Filip; D'have, Koen; Sebaai, Farid; Radisic, Dunja; Loo, Roger; Hopf, Toby; De Keersgieter, An; Arimura, Hiroaki; Eneman, Geert; Favia, Paola; Geypen, Jef; Arutchelvan, Goutham; Vaisman Chasin, Adrian; Jang, Doyoung; Nyns, Laura; Rosseel, Erik; Hikavyy, Andriy; Mannaert, Geert; Chan, BT; Devriendt, Katia; Demuynck, Steven; Van der Plas, Geert; Ryckaert, Julien; Beyer, Gerald; Dentoni Litta, Eugenio; Beyne, Eric; Horiguchi, Naoto (2021)