Now showing items 1-20 of 22

    • 28nm pitch single exposure patterning readiness by metal oxide resist on 0.33NA EUV Lithography 

      Kim, Il Hwan; Kim, Insung; Park, Changmin; Lee, Jsiun; Ryu, Koungmin; De Schepper, P.; Doise, J.; Kocsis, M.; De Simone, Danilo; Kljucar, Luka; Das, Poulomi; Blanc, Romuald; Beral, Christophe; Severi, Joren; Vandenbroeck, Nadia; Foubert, Philippe; Charley, Anne-Laure; Oak, Apoorva; Xu, Dongbo; Gillijns, Werner; Mitard, Jerome; Tokei, Zsolt; van der Veen, Marleen; Heylen, Nancy; Teugels, Lieve; Le, Quoc Toan; Schleicher, Filip; Leray, Philippe; Ronse, Kurt (2021)
    • Alternative metal recess for fully-self-aligned-vias 

      Contino, Antonino; Le, Quoc Toan; Sakamoto, Kei; Schleicher, Filip; Paolillo, Sara; Pacco, Antoine; Kesters, Els; Lorant, Christophe; Murdoch, Gayle; Lariviere, Stephane; Vega Gonzalez, Victor; Versluijs, Janko; Jaenen, Patrick; Teugels, Lieve; van der Veen, Marleen; Jourdan, Nicolas; Ciofi, Ivan; Boccardi, Guillaume; Tokei, Zsolt; Wilson, Chris (2020)
    • Buried Power Rail Integration for CMOS Scaling beyond the 3 nm Node 

      Gupta, Anshul; Tao, Zheng; Radisic, Dunja; Mertens, Hans; Varela Pedreira, Olalla; Demuynck, Steven; Boemmels, Juergen; Devriendt, Katia; Heylen, Nancy; Wang, Shouhua; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Peter, Antony; Rassoul, Nouredine; Siew, Yong Kong; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; Capogreco, Elena; Mannaert, Geert; Sepulveda Marquez, Alfonso; Dupuy, Emmanuel; Vandersmissen, Kevin; Chehab, Bilal; Murdoch, Gayle; Altamirano Sanchez, Efrain; Biesemans, Serge; Tokei, Zsolt; Dentoni Litta, Eugenio; Horiguchi, Naoto (2022)
    • Buried power rail integration with FinFETs for ultimate CMOS scaling 

      Gupta, Anshul; Varela Pedreira, Olalla; Arutchelvan, Goutham; Zahedmanesh, Houman; Devriendt, Katia; Hanssen, Frederik; Tao, Zheng; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, Noemie; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min-Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Cousserier, Joris; Yakimets, Dmitry; Lazzarino, Frederic; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Jaysankar, Manoj; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Boemmels, Juergen; Demuynck, Steven; Tokei, Zsolt; Horiguchi, Naoto (2020)
    • Buried Power Rail Integration with Si FinFETs for CMOS Scaling beyond the 5 nm Node 

      Gupta, Anshul; Mertens, Hans; Tao, Zheng; Demuynck, Steven; Boemmels, Juergen; Arutchelvan, Goutham; Devriendt, Katia; Varela Pedreira, Olalla; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Zahedmanesh, Houman; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, N.; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Yakimets, Dmitry; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Cousserier, Joris; Jaysankar, Manoj; Lazzarino, Frederic; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Tokei, Zsolt; Horiguchi, Naoto (2020)
    • Buried Power Rail Scaling and Metal Assessment for the 3 nm Node and Beyond 

      Gupta, Anshul; Varela Pedreira, Olalla; Tao, Zheng; Mertens, Hans; Radisic, Dunja; Jourdan, Nicolas; Devriendt, Katia; Heylen, Nancy; Wang, Shouhua; Chehab, Bilal; Jang, Doyoung; Hellings, Geert; Sebaai, Farid; Lorant, Christophe; Teugels, Lieve; Peter, Antony; Chan, BT; Schleicher, Filip; Demonie, Ingrid; Marien, Philippe; Sepulveda Marquez, Alfonso; Richard, Olivier; Nagesh, Nishanth; Lesniewska, Alicja; Lazzarino, Frederic; Ryckaert, Julien; Morin, Pierre; Altamirano Sanchez, Efrain; Murdoch, Gayle; Boemmels, Juergen; Demuynck, Steven; Na, Myung Hee; Tokei, Zsolt; Biesemans, Serge; Dentoni Litta, Eugenio; Horiguchi, Naoto (2020)
    • Design and Optimization of SRAM Macro and Logic Using Backside Interconnects at 2nm node 

      Chen, Rongmei; Sisto, Giuliano; Jourdain, Anne; Hiblot, Gaspard; Stucchi, Michele; Kakarla, Naveen; Chehab, Bilal; Salahuddin, Shairfe Muhammad; Schleicher, Filip; Veloso, Anabela; Hellings, Geert; Weckx, Pieter; Milojevic, Dragomir; Van der Plas, Geert; Ryckaert, Julien; Beyne, Eric (2021)
    • Enabling Logic with Backside Connectivity via n-TSVs and its Potential as a Scaling Booster 

      Veloso, Anabela; Jourdain, Anne; Hiblot, Gaspard; Schleicher, Filip; D'have, Koen; Sebaai, Farid; Radisic, Dunja; Loo, Roger; Hopf, Toby; De Keersgieter, An; Arimura, Hiroaki; Eneman, Geert; Favia, Paola; Geypen, Jef; Arutchelvan, Goutham; Vaisman Chasin, Adrian; Jang, Doyoung; Nyns, Laura; Rosseel, Erik; Hikavyy, Andriy; Mannaert, Geert; Chan, BT; Devriendt, Katia; Demuynck, Steven; Van der Plas, Geert; Ryckaert, Julien; Beyer, Gerald; Dentoni Litta, Eugenio; Beyne, Eric; Horiguchi, Naoto (2021)
    • Erase behavior of charge trap flash memory devices using high-k dielectric as blocking oxide liner 

      Ramesh, Siva; Ajaykumar, Arjun; Bastos, Joao; Breuil, Laurent; Arreghini, Antonio; Nyns, Laura; Soulie, Jean-Philippe; Ragnarsson, Lars-Ake; Schleicher, Filip; Jossart, Nico; Stiers, Jimmy; Van den Bosch, Geert; Rosmeulen, Maarten (2020)
    • Exploring the use of Tungsten-based Hard Masks in BEOL interconnects for 3nm node and beyond 

      Montero Alvarez, Daniel; Vega Gonzalez, Victor; Puliyalil, Harinarayanan; Nie, Jiuyuan; Yang, Jialing; Schleicher, Filip; Mclaughlin, Kevin; Versluijs, Janko; Lazzarino, Frederic; Park, Seongho; Tokei, Zsolt (2022-11-10)
    • Extreme contact shrink for back end of line connectivity 

      Schleicher, Filip; Paolillo, Sara; Decoster, Stefan; Wu, Chen; Vega Gonzalez, Victor; Hasan, Mahmudul; Beral, Christophe; Lazzarino, Frederic (2022-05-10)
    • Extreme Wafer Thinning and nano-TSV processing for 3D Heterogeneous Integration 

      Jourdain, Anne; Schleicher, Filip; De Vos, Joeri; Stucchi, Michele; Chery, Emmanuel; Miller, Andy; Beyer, Gerald; Van der Plas, Geert; Walsby, Edward; Roberts, Kerry; Ashraf, Huma; Thomas, Dave; Beyne, Eric (2020)
    • First demonstration of ruthenium and molybdenum word lines integrated into 40nm ptch 3D NAND memory devices 

      Ajaykumar, Arjun; Breuil, Laurent; Katcko, Kostantine; Schleicher, Filip; Sebaai, Farid; Oniki, Yusuke; Ramesh, Siva; Arreghini, Antonio; Nyns, Laura; Soulie, Jean-Philippe; Stiers, Jimmy; Rosmeulen, Maarten; Van den Bosch, Geert (2021)
    • Power, Performance, Area and Thermal Analysis of 2D and 3D ICs at A14 Node Designed with Back-side Power Delivery Network 

      Chen, Rongmei; Lofrano, Melina; Mirabelli, Gioele; Sisto, Giuliano; Yang, Simei; Jourdain, Anne; Schleicher, Filip; Veloso, Anabela; Zografos, Odysseas; Weckx, Pieter; Hiblot, Gaspard; Van der Plas, Geert; Hellings, Geert; Ryckaert, Julien; Beyne, Eric (2022)
    • Predictive compact model for stress-induced on-product overlay correction 

      Zhang, Huaichen; Tabery, Cyrus; Maas, Ruben; Khodko, Oleksandr; Blanco, Victor; Canga, Eren; Schleicher, Filip (2022)
    • Ru as an alternative material for advanced contacts 

      Hosseini, Maryam; Schaekers, Marc; van der Veen, Marleen; Teugels, Lieve; Batuk, Dmitry; Martinez Alanis, Gerardo Tadeo; Yu, Hao; Jourdan, Nicolas; Schleicher, Filip; Debruyn, Haroen; Vanstreels, Kris; Demuynck, Steven; Tokei, Zsolt; Horiguchi, Naoto (2020)
    • Scaled FinFETs Connected by Using Both Wafer Sides for Routing via Buried Power Rails 

      Veloso, Anabela; Jourdain, Anne; Radisic, Dunja; Chen, Rongmei; Arutchelvan, Goutham; O'Sullivan, Barry; Arimura, Hiroaki; Stucchi, Michele; De Keersgieter, An; Hosseini, Maryam; Hopf, Toby; D'have, Koen; Wang, Shouhua; Dupuy, Emmanuel; Mannaert, Geert; Vandersmissen, Kevin; Iacovo, Serena; Marien, Philippe; Choudhury, Subhobroto; Schleicher, Filip; Sebaai, Farid; Oniki, Yusuke; Zhou, X.; Gupta, Anshul; Schram, Tom; Briggs, Basoene; Lorant, Christophe; Rosseel, Erik; Hikavyy, Andriy; Loo, Roger; Geypen, Jef; Batuk, Dmitry; Martinez Alanis, Gerardo Tadeo; Soulie, Jean-Philippe; Devriendt, Katia; Chan, BT; Demuynck, Steven; Hiblot, Gaspard; Van der Plas, Geert; Ryckaert, Julien; Beyer, Gerald; Dentoni Litta, Eugenio; Beyne, Eric; Horiguchi, Naoto (2022)
    • Studying the efficacy of hydrogen plasma treatment for enabling the etching of thermally annealed ruthenium in chemical solutions 

      Le, Quoc Toan; Arslan, Esen; Rip, Jens; De Coster, Hanne; Verdonck, Patrick; Radisic, Dunja; Schleicher, Filip; Vaesen, Inge; Conard, Thierry; Altamirano Sanchez, Efrain (2023)
    • Supervia Process Integration and Reliability Compared to Stacked Vias Using Barrierless Ruthenium 

      Vega Gonzalez, Victor; Puliyalil, Harinarayanan; Versluijs, Janko; Lesniewska, Alicja; Varela Pedreira, Olalla; Baert, Rogier; Paolillo, Sara; Decoster, Stefan; Schleicher, Filip; Montero Alvarez, Daniel; Bekaert, Joost; Kesters, Els; Le, Quoc Toan; Lorant, Christophe; Teugels, Lieve; Heylen, Nancy; Jourdan, Nicolas; El-Mekki, Zaid; van der Veen, Marleen; Ciofi, Ivan; Briggs, Basoene; Heijlen, Jeroen; Dupas, Luc; De Wachter, Bart; Vancoille, Eric; Webers, Tomas; Vats, Hemant; Rynders, Luc; Cupak, Miroslav; Lee, Jae Uk; Drissi, Youssef; Halipre, Luc; Charley, Anne-Laure; Verdonck, Patrick; Witters, Thomas; Van Gompel, Sander; Kimura, Yosuke; Demonie, Ingrid; Lazzarino, Frederic; Ercken, Monique; Kim, Ryan Ryoung han; Trivkovic, Darko; Croes, Kristof; Leray, Philippe; Jaysankar, Manoj; Wilson, Chris; Murdoch, Gayle; Tokei, Zsolt (2020)
    • Tone reversal patterning for advanced technology nodes 

      Schleicher, Filip; Bekaert, Joost; Thiam, Arame; Decoster, Stefan; Blanc, Romuald; Lazzarino, Frederic; Santaclara, J. Garcia; Rispens, G.; Maslow, M. (2022)