Browsing by author "Lander, Rob"

45nm nMOSFET with metal gate on thin SiON driving 1150μA/μm and off-state of 10nA/μm

Henson, Kirklen; Lander, Rob; Demand, Marc; Dachs, Charles; Kaczer, Ben; Deweerd, Wim; Schram, Tom; Tokei, Zsolt; Hooker, Jacob; Cubaynes, Florence; Beckx, Stephan; Boullart, Werner; Coenegrachts, Bart; Vertommen, Johan; Richard, Olivier; Bender, Hugo; Vandervorst, Wilfried; Kaiser, M.; Everaert, Jean-Luc; Jurczak, Gosia; Biesemans, Serge (2004)

A practical baseline process for advanced CMOS devices research

Ponomarev, Youri; Loo, Josine; Rittersma, Chris; Lander, Rob; Hooker, Jacob; Doornbos, Gerben; Surdeanu, Radu; Cubaynes, Florence; Dachs, Charles; Kubicek, Stefan; Henson, Kirklen; Lindsay, Richard (2003)

Advanced FinFET devices for sub-32nm technology nodes: characteristics and integration challenges

Veloso, Anabela; Collaert, Nadine; De Keersgieter, An; Witters, Liesbeth; Rooyackers, Rita; Van Dal, Mark; Duffy, Ray; Pawlak, Bartek; Lander, Rob; Hoffmann, Thomas Y. (2009)

ALD deposition of high-k and metal gate stacks for advanced CMOS applications

Heyns, Marc; Beckx, Stephan; Caymax, Matty; Claes, Martine; De Gendt, Stefan; Degraeve, Robin; Delabie, Annelies; Deweerd, Wim; Groeseneken, Guido; Hooker, Jacob; Houssa, Michel; Kwak, Dong Hwa; Lander, Rob; Lujan, Guilherme; Maes, Jan; Niwa, Masaaki; Pantisano, Luigi; Puurunen, R.; Ragnarsson, Lars-Ake; Rohr, Erika; Schram, Tom; Van Elshocht, Sven; Vandervorst, Wilfried (2004)

Application of HCl etch in the production of novel devices

Hikavyy, Andriy; Rooyackers, Rita; Verheyen, Peter; Vellianitis, Georgios; Van Dal, Mark; Lander, Rob; Loo, Roger; Caymax, Matty (2008)

Application of HCl gas phase etch in the production of novel devices

Hikavyy, Andriy; Rooyackers, Rita; Verheyen, Peter; Leys, Frederik; Vellianitis, Georgios; Van Dal, Mark; Lander, Rob; Loo, Roger (2008-05)

Atomistic modeling of impurity ion implantation in ultra-thin-body Si devices

Pelaz, L.; Duffy, Ray; Aboy, M.; Marques, L.; Lopez, P.; Santos, I.; Pawlak, Bartek; Van Dal, Mark; Duriez, Blandine; Merelle, Thomas; Doornbos, Gerben; Collaert, Nadine; Witters, Liesbeth; Rooyackers, Rita; Vandervorst, Wilfried; Jurczak, Gosia; Kaiser, M.; Weemaes, R.; Van Berkum, J.; Breimer, P.; Lander, Rob (2008)

Characteristics and integration challenges of FinFET-based devices for (Sub-)22nm technology nodes circuit applications

Veloso, Anabela; Van Dal, Mark; Collaert, Nadine; De Keersgieter, An; Witters, Liesbeth; Rooyackers, Rita; Redolfi, Augusto; Brus, Stephan; Duffy, Ray; Pawlak, Bartek; Vellianitis, Georgios; Duriez, Blandine; Merelle, Thomas; Absil, Philippe; Biesemans, Serge; Jurczak, Gosia; Hoffmann, Thomas Y.; Lander, Rob (2009-10)

Device and circuit-level analog performance trade-offs: a comparative study of planar bulk FETs versus FinFETs

Subramanian, Vaidy; Parvais, Bertrand; Borremans, Jonathan; Mercha, Abdelkarim; Linten, Dimitri; Wambacq, Piet; Loo, Josine; Dehan, Morin; Collaert, Nadine; Kubicek, Stefan; Lander, Rob; Hooker, Jacob; Cubaynes, Florence; Donnay, Stephane; Jurczak, Gosia; Groeseneken, Guido; Sansen, Willy; Decoutere, Stefaan (2005)

Drift mobile and Hall scattering factors of holes in ultrathin Si1-xGex layers (0.3<x<0.4) grown on Si

Lander, Rob; Ponomarev, Youri; van Berkum, J. G. M.; de Boer, W. B.; Loo, Roger; Caymax, Matty (2000)

Experimental and physics-based modeling assessment of strain induced mobility enhancement in FinFETs

Serra, N.; Conzatti, F.; Esseni, D.; De Michielis, M.; Palestri, P.; Selmi, L.; Thomas, S.; Whall, T. E.; Parker, E. H. C.; Leadley, D. R.; Witters, Liesbeth; Hikavyy, Andriy; Hytch, M. J.; Houdellier, F.; Snoeck, E.; Wang, T. J.; Lee, W. C.; Vellianitis, Georgios; Van Dal, Mark; Duriez, Blandine; Doornbos, Gerben; Lander, Rob (2009)

First observation of FinFET specific mismatch behavior and optimization guidelines for SRAM scaling

Merelle, Thomas; Curatola, Gilberto; Nackaerts, Axel; Collaert, Nadine; Van Dal, Mark; Doornbos, Gerben; Doorn, T.S.; Christie, Phillip; Vellianitis, Georgios; Duriez, Blandine; Duffy, Ray; Pawlak, Bartek; Voogt, F.C.; Rooyackers, Rita; Witters, Liesbeth; Jurczak, Gosia; Lander, Rob (2008)

Gatestacks for scalable high-performance FinFETs

Vellianitis, Georgios; Van Dal, Mark; Witters, Liesbeth; Curatola, Gilberto; Doornbos, Gerben; Collaert, Nadine; Jonville, C.; Torregiani, Cristina; Lai, Li-Shyue; Petry, Jasmine; Pawlak, Bartek; Duffy, Ray; Demand, Marc; Beckx, Stephan; Mertens, Sofie; Delabie, Annelies; Vandeweyer, Tom; Delvaux, Christie; Leys, Frederik; Hikavyy, Andriy; Rooyackers, Rita; Kaiser, M.; Weemaes, R.G.R.; Voogt, F.; Roberts, H.; Donnet, D.; Biesemans, Serge; Jurczak, Gosia; Lander, Rob (2007)

Highly manufacturable FinFETs with sub-10nm fin width and high aspect ratio fabricated with immersion lithography

Van Dal, Mark; Collaert, Nadine; Doornbos, Gerben; Vellianitis, Georgios; Curatola, Gilberto; Pawlak, Bartek; Duffy, Ray; Jonville, Carole; Degroote, Bart; Altamirano Sanchez, Efrain; Kunnen, Eddy; Demand, Marc; Beckx, Stephan; Vandeweyer, Tom; Delvaux, Christie; Leys, Frederik; Hikavyy, Andriy; Rooyackers, Rita; Kaiser, M.; Weemaes, R.G.R.; Biesemans, Serge; Jurczak, Gosia; Kottantharayil, Anil; Witters, Liesbeth; Lander, Rob (2007)

Improved fin width scaling in fully-depleted FinFETs

Duffy, Ray; Van Dal, Mark; Pawlak, Bartek; Collaert, Nadine; Witters, Liesbeth; Rooyackers, Rita; Kaiser, M.; Weemaes, R. G. R.; Jurczak, Gosia; Lander, Rob (2008)

Introducing novel metal gate materials for decananometer CMOS in the agile fab: a case study

Deweerd, Wim; Schram, Tom; Catana, Gabriela; Shamiryan, Denis; Garaud, Sylvain; Hellin, David; De Gendt, Stefan; Heyns, Marc; Wickramanayaka, S.; Kawashima, T.; Yamada, N.; Vertommen, Johan; Lander, Rob (2004)

Ion implantation for low-resistive source/drain contacts in FinFET devices

Van Dal, Mark; Duffy, Ray; Pawlak, Bartek; Collaert, Nadine; Jurczak, Gosia; Lander, Rob (2008)

Junction architecture for planar devices

Pawlak, Bartek; Duffy, R.; Hoffmann, Thomas Y.; Severi, Simone; Felch, S.B.; Eyben, Pierre; Van Daele, Benny; Vandervorst, Wilfried; Lander, Rob (2007)

Matching performance of FinFET devices with fin widths down to 10nm

Magnone, Paolo; Mercha, Abdelkarim; Subramanian, Vaidy; Parvais, Bertrand; Collaert, Nadine; Dehan, Morin; Decoutere, Stefaan; Groeseneken, Guido; Benson, Jim; Merelle, Thomas; Lander, Rob; Crupi, Felice; Pace, C. (2009)

Material aspects and challenges for SOI FinFET integration

Van Dal, Mark; Vellianitis, Georgios; Duffy, Ray; Doornbos, Gerben; Pawlak, Bartek; Duriez, Blandine; Lai, Li-Shyue; Hikavyy, Andriy; Vandeweyer, Tom; Demand, Marc; Altamirano Sanchez, Efrain; Rooyackers, Rita; Witters, Liesbeth; Collaert, Nadine; Jurczak, Gosia; Kaiser, M.; Weemaes, R. G. R.; Lander, Rob (2008)