Browsing by author "Brus, Stephan"
Now showing items 1-20 of 90
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A low-voltage biasing scheme for aggressively scaled bulk FinFET 1T-DRAM featuring 10s retention at 85°C
Collaert, Nadine; Aoulaiche, Marc; De Wachter, Bart; Rakowski, Michal; Redolfi, Augusto; Brus, Stephan; De Keersgieter, An; Horiguchi, Naoto; Altimime, Laith; Jurczak, Gosia (2010) -
A metal hardmask approach for the contact patterning of a 0.186 μm² SRAM cell exposed with EUV lithography
de Marneffe, Jean-Francois; Goossens, Danny; Vandervorst, Alain; Demuynck, Steven; Goethals, Mieke; Hermans, Jan; Van Roey, Frieda; Baudemprez, Bart; Brus, Stephan; Vrancken, Christa (2008) -
A record GmSAT/SSSAT and PBTI reliability in Si-passivated Ge nFinFETs by improved gate stack surface preparation
Arimura, Hiroaki; Cott, Daire; Boccardi, Guillaume; Loo, Roger; Wostyn, Kurt; Brus, Stephan; Capogreco, Elena; Opdebeeck, Ann; Witters, Liesbeth; Conard, Thierry; Suhard, Samuel; van Dorp, Dennis; Kenis, Karine; Ragnarsson, Lars-Ake; Mitard, Jerome; Holsteyns, Frank; De Heyn, Vincent; Mocuta, Dan; Collaert, Nadine; Horiguchi, Naoto (2019-06) -
Achieving low VT Ni-FUSI CMOS via lanthanide incorporation in the gate stack
Veloso, Anabela; Yu, HongYu; Lauwers, Anne; Chang, Shou-Zen; Adelmann, Christoph; Onsia, Bart; Demand, Marc; Brus, Stephan; Vrancken, Christa; Singanamalla, Raghunath; Lehnen, Peer; Kittl, Jorge; Kauerauf, Thomas; Vos, Rita; O'Sullivan, Barry; Van Elshocht, Sven; Mitsuhashi, Riichirou; Whittemore, G.; Yin, K.M.; Niwa, Masaaki; Hoffmann, Thomas; Absil, Philippe; Jurczak, Gosia; Biesemans, Serge (2007-09) -
Achieving Low-VT Ni-FUSI CMOS by ultra-thin Dy2O3 capping of hafnium silicate dielectrics
Veloso, Anabela; Yu, HongYu; Chang, S.Z.; Adelmann, Chris; Onsia, Bart; Brus, Stephan (2007) -
Achieving low-VT Ni-FUSI CMOS via Lanthanide incorporation in the gate stack
Veloso, Anabela; Yu, HongYu; Lauwers, Anne; Chang, Shou-Zen; Adelmann, Christoph; Onsia, Bart; Demand, Marc; Brus, Stephan; Vrancken, Christa; Singanamalla, Raghunath; Lehnen, Peer; Kittl, Jorge; Kauerauf, Thomas; Vos, Rita; O'Sullivan, Barry; Van Elshocht, Sven; Mitsuhashi, Riichirou; Whittemore, G.; Yin, K.M.; Niwa, Masaaki; Hoffmann, Thomas; Absil, Philippe; Jurczak, Gosia; Biesemans, Serge (2008) -
Addressing Key Challenges for SiGe-pFin Technologies: Fin Integrity, Low-D-IT Si-cap-free Gate Stack and Optimizing the Channel Strain
Arimura, Hiroaki; Capogreco, Elena; Wostyn, Kurt; Eneman, Geert; Ragnarsson, Lars-Ake; Brus, Stephan; Baudot, Sylvain; Peter, Antony; Schram, Tom; Favia, Paola; Richard, Olivier; Bender, Hugo; Mitard, Jerome; Horiguchi, Naoto (2020) -
Addressing key concerns for implementation of Ni FUSI into manufacturing for 45/32 nm CMOS
Shickova, Adelina; Kauerauf, Thomas; Rothschild, Aude; Aoulaiche, Marc; Sahhaf, Sahar; Kaczer, Ben; Veloso, Anabela; Torregiani, Cristina; Pantisano, Luigi; Lauwers, Anne; Zahid, Mohammed; Rost, Tim; Tigelaar, H.; Pas, M.; Fretwell, J.; McCormack, J.; Hoffmann, Thomas; Kerner, Christoph; Chiarella, Thomas; Brus, Stephan; Harada, Yoshinao; Niwa, Masaaki; Kaushik, Vidya; Maes, Herman; Absil, Philippe; Groeseneken, Guido; Biesemans, Serge; Kittl, Jorge (2007) -
Benchmarking SOI and bulk FinFET alternatives for PLANAR CMOS scaling succession
Chiarella, Thomas; Witters, Liesbeth; Mercha, Abdelkarim; Kerner, Christoph; Rakowski, Michal; Ortolland, Claude; Ragnarsson, Lars-Ake; Parvais, Bertrand; De Keersgieter, An; Kubicek, Stefan; Redolfi, Augusto; Vrancken, Christa; Brus, Stephan; Lauwers, Anne; Absil, Philippe; Biesemans, Serge; Hoffmann, Thomas Y. (2010) -
BEOL compatible WS2 transistors fully fabricated in a 300 mm pilot line
Schram, Tom; Smets, Quentin; Heyne, Markus; Groven, Benjamin; Kunnen, Eddy; Thiam, Arame; Devriendt, Katia; Delabie, Annelies; Lin, Dennis; Chiappe, Daniele; Asselberghs, Inge; Lux, Marcel; Brus, Stephan; Huyghebaert, Cedric; Sayan, Safak; Juncker, Aurélie; Caymax, Matty; Radu, Iuliana (2017) -
BTI reliability improvement strategies in low thermal budget gate dtacks for 3D sequential integration
Franco, Jacopo; Wu, Zhicheng; Rzepa, Gerhard; Vandooren, Anne; Arimura, Hiroaki; Ragnarsson, Lars-Ake; Hellings, Geert; Brus, Stephan; Cott, Daire; De Heyn, Vincent; Groeseneken, Guido; Horiguchi, Naoto; Ryckaert, Julien; Collaert, Nadine; Linten, Dimitri; Grasser, Tibor; Kaczer, Ben (2018-12) -
Capping-metal gate integration technology for multiple-VT CMOS in MuGFETs
Veloso, Anabela; Witters, Liesbeth; Demand, Marc; Ferain, Isabelle; Son, Nak Jin; Kaczer, Ben; Roussel, Philippe; Adelmann, Christoph; Brus, Stephan; Richard, Olivier; Bender, Hugo; Conard, Thierry; Vos, Rita; Rooyackers, Rita; Van Elshocht, Sven; Collaert, Nadine; De Meyer, Kristin; Biesemans, Serge; Jurczak, Malgorzata (2008) -
Challenges and opportunities for vertical nanowire FETs: device design and fabrication
Veloso, Anabela; Matagne, Philippe; Huynh Bao, Trong; Eneman, Geert; Loo, Roger; Wostyn, Kurt; Brus, Stephan; Boemmels, Juergen; Mocuta, Dan; Ryckaert, Julien (2018) -
Challenges and opportunities of vertical FET devices using 3D circuit design layouts
Veloso, Anabela; Huynh Bao, Trong; Rosseel, Erik; Paraschiv, Vasile; Devriendt, Katia; Vecchio, Emma; Delvaux, Christie; Chan, BT; Ercken, Monique; Tao, Zheng; Li, Waikin; Altamirano Sanchez, Efrain; Versluijs, Janko; Brus, Stephan; Matagne, Philippe; Waldron, Niamh; Ryckaert, Julien; Mocuta, Dan; Collaert, Nadine (2016) -
Challenges building a 22nm node 6T-SRAM cell using immersion lithography
Ercken, Monique; Altamirano Sanchez, Efrain; Baerts, Christina; Brus, Stephan; De Backer, Johan; Demand, Marc; Delvaux, Christie; Horiguchi, Naoto; Locorotondo, Sabrina; Vandeweyer, Tom; Veloso, Anabela; Verhaegen, Staf (2009) -
Challenges in using optical lithography for the building of a 22 nm node 6T=-SRAM cell
Ercken, Monique; Altamirano Sanchez, Efrain; Baerts, Christina; Brus, Stephan; De Backer, Johan; Delvaux, Christie; Demand, Marc; Horiguchi, Naoto; Locorotondo, Sabrina; Vandeweyer, Tom; Veloso, Anabela; Verhaegen, Staf (2010) -
Challenges on surface conditioning in 3D device architectures: triple-gate FinFETs, gate-all-around lateral and vertical nanowire FETs
Veloso, Anabela; Paraschiv, Vasile; Vecchio, Emma; Devriendt, Katia; Li, Waikin; Simoen, Eddy; Chan, BT; Tao, Zheng; Rosseel, Erik; Loo, Roger; Milenin, Alexey; Kunert, Bernardette; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; van Dorp, Dennis; Altamirano Sanchez, Efrain; Brus, Stephan; Marien, Philippe; Fleischmann, Claudia; Melkonyan, Davit; Huynh Bao, Trong; Eneman, Geert; Hellings, Geert; Sibaja-Hernandez, Arturo; Matagne, Philippe; Waldron, Niamh; Mocuta, Dan; Collaert, Nadine (2017) -
Challenges on surface conditioning in 3D device architectures: triple-gate finFETs, gate-all-around lateral and vertical nanowireFETs
Veloso, Anabela; Paraschiv, Vasile; Vecchio, Emma; Devriendt, Katia; Li, Waikin; Simoen, Eddy; Chan, BT; Tao, Zheng; Rosseel, Erik; Loo, Roger; Milenin, Alexey; Kunert, Bernardette; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; van Dorp, Dennis; Altamirano Sanchez, Efrain; Brus, Stephan; Marien, Philippe; Sibaja-Hernandez, Arturo; Matagne, Philippe; Waldron, Niamh; Mocuta, Dan; Collaert, Nadine (2017) -
Characteristics and integration challenges of FinFET-based devices for (Sub-)22nm technology nodes circuit applications
Veloso, Anabela; Van Dal, Mark; Collaert, Nadine; De Keersgieter, An; Witters, Liesbeth; Rooyackers, Rita; Redolfi, Augusto; Brus, Stephan; Duffy, Ray; Pawlak, Bartek; Vellianitis, Georgios; Duriez, Blandine; Merelle, Thomas; Absil, Philippe; Biesemans, Serge; Jurczak, Gosia; Hoffmann, Thomas Y.; Lander, Rob (2009-10) -
CMOS integration of dual work function phase controlled Ni FUSI with simultaneous integration of nMOS (NiSi) and pMOS (Ni-rich silicide) gates on HfSiON
Lauwers, Anne; Veloso, Anabela; Hoffmann, Thomas Y.; Van Dal, Mark; Vrancken, Christa; Brus, Stephan; Locorotondo, Sabrina; de Marneffe, Jean-Francois; Sijmus, Bram; Kubicek, Stefan; Chiarella, Thomas; Kmieciak, Malgorzata; Opsomer, Karl; Niwa, Masaaki; Mitsuhashi, Riichirou; Kottantharayil, Anil; Yu, HongYu; Demeurisse, Caroline; Verbeeck, Rita; de Potter de ten Broeck, Muriel; Absil, Philippe; Maex, Karen; Jurczak, Gosia; Biesemans, Serge; Kittl, Jorge (2005-12)