Browsing by author "Dupuy, Emmanuel"

Now showing items 1-20 of 23

    • 1/f noise in fully integrated electrolytically gated FinFETs with fin width down to 20nm 

      Martens, Koen; Du Bois, Bert; Van Roy, Wim; Severi, Simone; Siew, Yong Kong; Gupta, Anshul; Dupuy, Emmanuel; Radisic, Dunja; Altamirano Sanchez, Efrain; Simoen, Eddy (2019)

    • 3D FinFET gate etch for advanced CMOS scaling 

      Dupuy, Emmanuel; Altamirano Sanchez, Efrain; Marinov, Daniil; Hody, Hubert; Mertens, Hans; Siew, Yong Kong; Demuynck, Steven; Horiguchi, Naoto (2019)

    • 80 nm tall thermally stable cost effective FinFETs for advanced dynamic random access memory periphery devices for artificial intelligence/machine learning and automotive applications 

      Spessot, Alessio; Ritzenthaler, Romain; Dentoni Litta, Eugenio; Dupuy, Emmanuel; O'Sullivan, Barry; Bastos, Joao; Capogreco, Elena; Miyaguchi, Kenichi; Machkaoutsan, Vladimir; Yoon, Younggwang; Fazan, Pierre; Horiguchi, Naoto (2021)

    • 80nm tall thermally stable cost effective FinFETs for advanced DRAM periphery devices for AI/ML and Automotive applications 

      Spessot, Alessio; Ritzenthaler, Romain; Dentoni Litta, Eugenio; Dupuy, Emmanuel; O'Sullivan, Barry; Bastos, Joao; Capogreco, Elena; Miyaguchi, Kenichi; Machkaoutsan, Vladimir; Yoon, Younggwang; Fazan, Pierre; Horiguchi, Naoto (2020)

    • BioFET technology: aggressively scaled pMOS FinFET as biosensor 

      Martens, Koen; Santermans, Sybren; Gupta, Mihir; Hellings, Geert; Wuytens, Robin; Du Bois, Bert; Dupuy, Emmanuel; Altamirano Sanchez, Efrain; Jans, Karolien; Vos, Rita; Stakenborg, Tim; Lagae, Liesbet; Heyns, Marc; Severi, Simone; Van Roy, Wim (2019)

    • Buried Power Rail Integration for CMOS Scaling beyond the 3 nm Node 

      Gupta, Anshul; Tao, Zheng; Radisic, Dunja; Mertens, Hans; Varela Pedreira, Olalla; Demuynck, Steven; Boemmels, Juergen; Devriendt, Katia; Heylen, Nancy; Wang, Shouhua; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Peter, Antony; Rassoul, Nouredine; Siew, Yong Kong; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; Capogreco, Elena; Mannaert, Geert; Sepulveda Marquez, Alfonso; Dupuy, Emmanuel; Vandersmissen, Kevin; Chehab, Bilal; Murdoch, Gayle; Altamirano Sanchez, Efrain; Biesemans, Serge; Tokei, Zsolt; Dentoni Litta, Eugenio; Horiguchi, Naoto (2022)

    • Buried power rail integration with FinFETs for ultimate CMOS scaling 

      Gupta, Anshul; Varela Pedreira, Olalla; Arutchelvan, Goutham; Zahedmanesh, Houman; Devriendt, Katia; Hanssen, Frederik; Tao, Zheng; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, Noemie; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min-Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Cousserier, Joris; Yakimets, Dmitry; Lazzarino, Frederic; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Jaysankar, Manoj; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Boemmels, Juergen; Demuynck, Steven; Tokei, Zsolt; Horiguchi, Naoto (2020)

    • Buried Power Rail Integration with Si FinFETs for CMOS Scaling beyond the 5 nm Node 

      Gupta, Anshul; Mertens, Hans; Tao, Zheng; Demuynck, Steven; Boemmels, Juergen; Arutchelvan, Goutham; Devriendt, Katia; Varela Pedreira, Olalla; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Zahedmanesh, Houman; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, N.; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Yakimets, Dmitry; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Cousserier, Joris; Jaysankar, Manoj; Lazzarino, Frederic; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Tokei, Zsolt; Horiguchi, Naoto (2020)

    • Cumulated charging mechanisms at gate processing in high-kappa first planar NMOS devices 

      Hiblot, Gaspard; Parihar, Narendra; Dupuy, Emmanuel; Mannaert, Geert; Baudot, Sylvain; Kaczer, Ben; De Heyn, Vincent; Mercha, Abdelkarim (2020)

    • FEOL dry etch process challenges of ultimate FinFET scaling and next generation device architectures beyond N3 

      Tao, Zheng; Zhang, Liping; Dupuy, Emmanuel; Chan, BT; Altamirano Sanchez, Efrain; Lazzarino, Frederic (2020)

    • FinFETs with Thermally Stable RMG Gate Stack for Future DRAM Peripheral Circuits 

      Capogreco, Elena; Arimura, Hiroaki; Ritzenthaler, Romain; Brus, Stephan; Oniki, Yusuke; Dupuy, Emmanuel; Sebaai, Farid; Radisic, Dunja; Chan, BT; Zhou, Daisy; Machkaoutsan, V.; Yoon, S.; Itokawa, H.; Yamaguchi, M.; Gao, Z.; Fazan, P.; Chen, Y.; Subramanian, Sujith; Ragnarsson, Lars-Ake; Spessot, Alessio; Dentoni Litta, Eugenio (2022)

    • Forksheet FETs for Advanced CMOS Scaling: Forksheet-Nanosheet Co-Integration and Dual Work Function Metal Gates at 17nm N-P Space 

      Mertens, Hans; Ritzenthaler, Romain; Oniki, Yusuke; Briggs, Basoene; Chan, BT; Hikavyy, Andriy; Hopf, Toby; Mannaert, Geert; Tao, Zheng; Sebaai, Farid; Peter, Antony; Vandersmissen, Kevin; Dupuy, Emmanuel; Rosseel, Erik; Batuk, Dmitry; Geypen, Jef; Martinez Alanis, Gerardo Tadeo; Abigail, Daniel_; Grieten, Eva; D'have, Koen; Mitard, Jerome; Subramanian, Sujith; Ragnarsson, Lars-Ake; Weckx, Pieter; Chehab, Bilal; Hellings, Geert; Ryckaert, Julien; Dentoni Litta, Eugenio; Horiguchi, Naoto (2021)

    • Forksheet FETs with Bottom Dielectric Isolation, Self-Aligned Gate Cut, and Isolation between Adjacent Source-Drain Structures 

      Mertens, Hans; Ritzenthaler, Romain; Oniki, Yusuke; Puttarame Gowda, Pallavi; Mannaert, Geert; Sebaai, Farid; Hikavyy, Andriy; Rosseel, Erik; Dupuy, Emmanuel; Peter, Antony; Vandersmissen, Kevin; Radisic, Dunja; Briggs, Basoene; Batuk, Dmitry; Geypen, Jef; Martinez Alanis, Gerardo Tadeo; Seidel, Felix; Richard, Olivier; Chan, BT; Mitard, Jerome; Dentoni Litta, Eugenio; Horiguchi, Naoto (2022)

    • Gate-First High-k/Metal Gate FinFET for advanced DRAM peripheral transistors 

      Dupuy, Emmanuel; Capogreco, Elena; Dentoni Litta, Eugenio; Tao, Zheng; Sebaai, Farid; Spessot, Alessio; Horiguchi, Naoto (2022-09-20)

    • High performance strained Germanium Gate All Around p-channel devices with excellent electrostatic control for sub-30 nm Lg 

      Capogreco, Elena; Arimura, Hiroaki; Vohra, Anurag; Porret, Clément; Loo, Roger; De Keersgieter, An; Dupuy, Emmanuel; Marinov, Daniil; Hikavyy, Andriy; Sebaai, Farid; Mannaert, Geert; Ragnarsson, Lars-Ake; Siew, Yong Kong; Vrancken, Christa; Opdebeeck, Ann; Mitard, Jerome; Langer, Robert; Altamirano Sanchez, Efrain; Holsteyns, Frank; Demuynck, Steven; Barla, Kathy; De Heyn, Vincent; Mocuta, Dan; Collaert, Nadine; Horiguchi, Naoto (2019)

    • High yield and process uniformity for 300 mm integrated WS2 FETs 

      Schram, Tom; Smets, Quentin; Radisic, Dunja; Groven, Benjamin; Thiam, Arame; Li, Waikin; Dupuy, Emmanuel; Vandersmissen, Kevin; Maurice, Thibaut; Asselberghs, Inge; Radu, Iuliana (2021)

    • Impact of dimensions of memory periphery FinFETs on bias temperature instability 

      Boubaaya, M; O'Sullivan, Barry; Djezzar, B; Franco, Jacopo; Dentoni Litta, Eugenio; Ritzenthaler, Romain; Dupuy, Emmanuel; Machkaoutsan, Vladimir; Fazan, Pierre; Kim, C.; Benaceur-Doumaz, D.; Ferhat Hamida, A.; Spessot, Alessio; Linten, Dimitri; Horiguchi, Naoto (2020)

    • Impact of fin height on bias temperature instability of memory periphery FinFETs 

      Boubaaya, Mohamed; O'Sullivan, Barry; Franco, Jacopo; Dentoni Litta, Eugenio; Ritzenthaler, Romain; Dupuy, Emmanuel; Machkaoutsan, Vladimir; Fazan, Pierre; Cheolgyu Kim, Cheolgyu; Spessot, Alessio; Linten, Dimitri; Horiguchi, Naoto (2019)

    • Plasma Charging Damage in HK-First and HK-Last RMG NMOS Devices 

      Hiblot, Gaspard; Parihar, Narendra; Dupuy, Emmanuel; Mannaert, Geert; Baudot, Sylvain; Kaczer, Ben; Franco, Jacopo; Vandooren, Anne; De Heyn, Vincent; Mercha, Abdelkarim (2021)

    • Scaled FinFETs Connected by Using Both Wafer Sides for Routing via Buried Power Rails 

      Veloso, Anabela; Jourdain, Anne; Radisic, Dunja; Chen, Rongmei; Arutchelvan, Goutham; O'Sullivan, Barry; Arimura, Hiroaki; Stucchi, Michele; De Keersgieter, An; Hosseini, Maryam; Hopf, Toby; D'have, Koen; Wang, Shouhua; Dupuy, Emmanuel; Mannaert, Geert; Vandersmissen, Kevin; Iacovo, Serena; Marien, Philippe; Choudhury, Subhobroto; Schleicher, Filip; Sebaai, Farid; Oniki, Yusuke; Zhou, X.; Gupta, Anshul; Schram, Tom; Briggs, Basoene; Lorant, Christophe; Rosseel, Erik; Hikavyy, Andriy; Loo, Roger; Geypen, Jef; Batuk, Dmitry; Martinez Alanis, Gerardo Tadeo; Soulie, Jean-Philippe; Devriendt, Katia; Chan, BT; Demuynck, Steven; Hiblot, Gaspard; Van der Plas, Geert; Ryckaert, Julien; Beyer, Gerald; Dentoni Litta, Eugenio; Beyne, Eric; Horiguchi, Naoto (2022)