Browsing by author "Aoulaiche, Marc"
Now showing items 1-20 of 175
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2D and 3D Fully-depleted extension-less devices for advanced logic and memory applications
Veloso, Anabela; De Keersgieter, An; Aoulaiche, Marc; Jurczak, Gosia; Thean, Aaron; Horiguchi, Naoto (2012-09) -
A Low frequency noise characterization in n-channel UTBOX devices with 6 nm Si film
Cretu, Bogdan; Simoen, Eddy; Routoure, Jean-Marc; Carin, Regis; Aoulaiche, Marc; Claeys, Cor (2013) -
A low-power HKMG CMOS platform compatible with DRAM node 2x and beyond
Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; Caillat, Christian; Aoulaiche, Marc; Cho, Moon Ju; Noh, Kyung Bong; Son, Yunik; Na, Hoon Jo; Kauerauf, Thomas; Douhard, Bastien; Nazir, Aftab; Chew, Soon Aik; Milenin, Alexey; Altamirano Sanchez, Efrain; Schoofs, Geert; Albert, Johan; Sebaai, Farid; Vecchio, Emma; Paraschiv, Vasile; Vandervorst, Wilfried; Lee, Sun Ghil; Collaert, Nadine; Fazan, Pierre; Horiguchi, Naoto; Thean, Aaron (2014) -
A low-voltage biasing scheme for aggressively scaled bulk FinFET 1T-DRAM featuring 10s retention at 85°C
Collaert, Nadine; Aoulaiche, Marc; De Wachter, Bart; Rakowski, Michal; Redolfi, Augusto; Brus, Stephan; De Keersgieter, An; Horiguchi, Naoto; Altimime, Laith; Jurczak, Gosia (2010) -
A new high-k/metal gate CMOS integration scheme (Diffusion and Gate Replacement) suppressing gate height asymmetry and compatible with high-thermal budget memory technologies
Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; Caillat, Christian; Cho, Moon Ju; Simoen, Eddy; Aoulaiche, Marc; Albert, Johan; Chew, Soon Aik; Noh, Kyung Bong; Son, Yunik; Fazan, Pierre; Horiguchi, Naoto; Thean, Aaron (2014) -
A novel low-voltage biasing scheme for double gate FBC achieving 5s retention and 10^16 endurance at 85°C
Lu, Zhichao; Collaert, Nadine; Aoulaiche, Marc; De Wachter, Bart; De Keersgieter, An; Schwarzenbach, W.; Bonnin, O.; Bourdelle, K.K.; Nguyen, B.-Y.; Mazure, C.; Altimime, Laith; Jurczak, Gosia (2010) -
Addressing key concerns for implementation of Ni FUSI into manufacturing for 45/32 nm CMOS
Shickova, Adelina; Kauerauf, Thomas; Rothschild, Aude; Aoulaiche, Marc; Sahhaf, Sahar; Kaczer, Ben; Veloso, Anabela; Torregiani, Cristina; Pantisano, Luigi; Lauwers, Anne; Zahid, Mohammed; Rost, Tim; Tigelaar, H.; Pas, M.; Fretwell, J.; McCormack, J.; Hoffmann, Thomas; Kerner, Christoph; Chiarella, Thomas; Brus, Stephan; Harada, Yoshinao; Niwa, Masaaki; Kaushik, Vidya; Maes, Herman; Absil, Philippe; Groeseneken, Guido; Biesemans, Serge; Kittl, Jorge (2007) -
Advanced dielectrics targeting 2X DRAM MIM capacitors
Popovici, Mihaela Ioana; Swerts, Johan; Aoulaiche, Marc; Redolfi, Augusto; Kaczer, Ben; Kim, Min-Soo; Douhard, Bastien; Delabie, Annelies; Clima, Sergiu; Jurczak, Gosia; Van Elshocht, Sven (2013) -
Advanced doping techniques for DRAM peripheral MOSFETs
Spessot, Alessio; Ritzenthaler, Romain; Schram, Tom; Aoulaiche, Marc; Cho, Moon Ju; Toledano Luque, Maria; Fazan, Pierre (2015) -
Advanced electrical characterization toward (sub) 1nm EOT HfSiON – hole trapping in PFET and L-dependent effects
Zahid, Mohammed; Pantisano, Luigi; Degraeve, Robin; Aoulaiche, Marc; Trojman, Lionel; Ferain, Isabelle; San Andres Serrano, Enrique; Groeseneken, Guido; Zhang, J.F.; Heyns, Marc; Jurczak, Gosia; De Gendt, Stefan (2007) -
Advanced PBTI reliability with 0.69nm EOT GdHfO gate dielectric
Cho, Moon Ju; Aoulaiche, Marc; Degraeve, Robin; Kaczer, Ben; Kauerauf, Thomas; Ragnarsson, Lars-Ake; Adelmann, Christoph; Van Elshocht, Sven; Hoffmann, Thomas Y.; Groeseneken, Guido (2011) -
Advanced USJ for high-k / metal gate CMOS devices
Absil, Philippe; Ortolland, Claude; Aoulaiche, Marc; Rosseel, Erik; Verheyen, Peter; Vrancken, Christa; Horiguchi, Naoto; Noda, Tajii; Felch, Susan; Schreutelkamp, Rob; Hoffmann, Thomas Y. (2008) -
Advantages of different source/drain engineering on scaled UTBOX FD SOI nMOSFETs at high temperature operation
Nicoletti, Talitha; Dos Santos, Sara; Martino, Joao A.; Aoulaiche, Marc; Veloso, Anabela; Jurczak, Gosia; Simoen, Eddy; Claeys, Cor (2014) -
Analog parameters of MuGFET devices with different source/drain engineering
Galeti, M.; Rodrigues, M.; Martino, J.A.; Collaert, Nadine; Simoen, Eddy; Aoulaiche, Marc; Claeys, Cor (2012) -
Analysis of sense margin and reliability of 1T-DRAM fabricated on thin-film UTBOX substrates
Collaert, Nadine; Aoulaiche, Marc; Rakowski, Michal; De Wachter, Bart; Bourdelle, K.; Nguyen, B.-Y.; Boedt, F.; Delprat, D.; Jurczak, Gosia (2009) -
Analysis of UTBOX-1T DRAM memory cell at high temperatures
Almeida, L.M.; Sasaki, K.R.A.; Aoulaiche, Marc; Simoen, Eddy; Claeys, Cor (2011) -
Analytical model for anomalous positive bias temperature instability in La-based HfO2 nFETs based on independent characterization of charging components
Toledano Luque, Maria; Kaczer, Ben; Aoulaiche, Marc; Spessot, Alessio; Roussel, Philippe; Ritzenthaler, Romain; Schram, Tom; Thean, Aaron; Groeseneken, Guido (2013) -
Analytical model for anomalous positive bias temperature instability in La-based HfO2 nFETs based on independent characterization of charging components
Toledano Luque, Maria; Kaczer, Ben; Aoulaiche, Marc; Spessot, Alessio; Roussel, Philippe; Ritzenthaler, Romain; Schram, Tom; Thean, Aaron; Groeseneken, Guido (2013) -
Anomalous positive-bias temperature instability of high-k/metal gate devices with Dy2O3 capping
O'Connor, Robert; Chang, Vincent; Pantisano, Luigi; Ragnarsson, Lars-Ake; Aoulaiche, Marc; O'Sullivan, Barry; Groeseneken, Guido (2008) -
Anomalous positive-bias temperature instability of high-k/metal gate nMOSFET devices with Dy2O3 capping
O'Connor, Robert; Chang, Vincent; Pantisano, Luigi; Ragnarsson, Lars-Ake; Aoulaiche, Marc; O'Sullivan, Barry; Adelmann, Christoph; Van Elshocht, Sven; Lehnen, Peer; Yu, HongYu; Groeseneken, Guido (2008)