Browsing by author "Mertens, Hans"
Now showing items 21-40 of 120
-
Comparison of temperature dependent carrier transport in FinFET and gate-all-Around nanowire FET
Kim, Soohyun; Kim, Jungchun; Jang, Doyoung; Ritzenthaler, Romain; Parvais, Bertrand; Mitard, Jerome; Mertens, Hans; Chiarella, Thomas; Horiguchi, Naoto; Lee, Jae Woo (2020) -
Complete degradation mapping of stacked gate-all-around Si nanowire transistors considering both intrinsic and extrinsic effects
Vaisman Chasin, Adrian; Bury, Erik; Kaczer, Ben; Franco, Jacopo; Roussel, Philippe; Ritzenthaler, Romain; Mertens, Hans; Horiguchi, Naoto; Linten, Dimitri; Mocuta, Anda (2017) -
Contact inspection and resistance - capacitance measurement of Si nanowire with SEM voltage contrast
Ohashi, Takeyoshi; Hasumi, Kazuhisa; Ikota, Masami; Lorusso, Gian; Mertens, Hans; Horiguchi, Naoto (2019) -
Disruptive Technology Elements, and Rapid and Accurate Block-Level Performance Evaluation for 3nm and Beyond
Na, Myung Hee; Jang, Doyoung; Baert, Rogier; Sarkar, Satadru; Patli, Sudhir; Zografos, Odysseas; Chehab, Bilal; Spessot, Alessio; Sisto, Giuliano; Schuddinck, Pieter; Mertens, Hans; Oniki, Yusuke; Hellings, Geert; Dentoni Litta, Eugenio; Ryckaert, Julien; Horiguchi, Naoto (2021) -
Distribution function based simulations of hot-carrier degradation in nanowire FETs
Vandemaele, Michiel; Kaczer, Ben; Stanojevic, Zlatan; Tyaginov, Stanislav; Makarov, Alexander; Vaisman Chasin, Adrian; Mertens, Hans; Linten, Dimitri; Groeseneken, Guido (2018) -
Dynamic threshold voltage influence on Ge pMOSFET hysteresis
Oliveira, A. V.; Agopian, P. G. D.; Martino, A.; Arimura, Hiroaki; Mitard, Jerome; Mertens, Hans; Mocuta, Anda; Collaert, Nadine; Simoen, Eddy; Claeys, Cor; Thean, Aaron (2015) -
Engineering high quality and conformal ultrathin SiNx films by PEALD for downscaled and advanced CMOS nodes
Tomomi, Takayama; Taishi, Ebisudani; Eiichiro, Shiba; Sepulveda Marquez, Alfonso; Blanquart, Timothee; Kimura, Yosuke; Subramanian, Sujith; Baudot, Sylvain; Briggs, Basoene; Gupta, Anshul; Veloso, Anabela; Capogreco, Elena; Mertens, Hans; Meersschaut, Johan; Conard, Thierry; Dara, Praveen; Geypen, Jef; Martinez Alanis, Gerardo Tadeo; Batuk, Dmitry; Demuynck, Steven; Morin, Pierre (2021) -
ESD characterization of germanium ESD devices
Boschke, Roman; Linten, Dimitri; Hellings, Geert; Chen, Shih-Hung; Scholz, Mirko; Mitard, Jerome; Mertens, Hans; Witters, Liesbeth; Van Campenhout, Joris; Verheyen, Peter; Pogany, Dionyz; Groeseneken, Guido (2014-09) -
ESD diodes in Bulk Si gate-all-around vertically stacked horizontal nanowire technology
Chen, Shih-Hung; Hellings, Geert; Scholz, Mirko; Linten, Dimitri; Mertens, Hans; Ritzenthaler, Romain; Boschke, Roman; Groeseneken, Guido; Horiguchi, Naoto (2016) -
ESD diodes in next generation bulk FinFET and GAA NW technology nodes
Chen, Shih-Hung; Hellings, Geert; Linten, Dimitri; Mertens, Hans; Chiarella, Thomas; Mitard, Jerome; Mocuta, Anda; Horiguchi, Naoto (2018) -
ESD protection diodes in bulk Si gate-all- around vertically stacked horizontal nanowire technology
Chen, Shih-Hung; Hellings, Geert; Linten, Dimitri; Mertens, Hans; Mocuta, Anda; Horiguchi, Naoto (2019) -
ESD protection diodes in sub-5nm gate-all-around nanosheet technologies
Chen, Shih-Hung; Veloso, Anabela; Mertens, Hans; Hellings, Geert; Simicic, Marko; Chen, Wen Chieh; Wu, Wei-Min; Serbulova, Kateryna; Linten, Dimitri; Horiguchi, Naoto (2020) -
Evaluating Forksheet FET Reliability Concerns by Experimental Comparison with Co-integrated Nanosheets
Bury, Erik; Vaisman Chasin, Adrian; Kaczer, Ben; Vandemaele, M.; Tyaginov, S.; Franco, Jacopo; Ritzenthaler, Romain; Mertens, Hans; Weckx, Pieter; Horiguchi, Naoto; Linten, Dimitri (2022) -
Evaluation of the accuracy and precision of STEM and EDS metrology on horizontal GAA nanowire devices
Johanesen, Hayley; Strauss, Michael; Kenslea, Anne; Hakala, Chris; Kwakman, Laurens; Boullart, Werner; Mertens, Hans; Siew, Yong Kong; Barla, Kathy (2019) -
Extreme scaling enabled by 5 tracks cells : holistic design-device co-optimization for FinFETs and lateral nanowires
Garcia Bardon, Marie; Sherazi, Yasser; Schuddinck, Pieter; Jang, Doyoung; Yakimets, Dmitry; Debacker, Peter; Baert, Rogier; Mertens, Hans; Badaroglu, Mustafa; Mocuta, Anda; Horiguchi, Naoto; Mocuta, Dan; Raghavan, Praveen; Ryckaert, Julien; Verkest, Diederik; Steegen, An (2016) -
Fin bending in dimensional scaling
Zhang, Liping; Hellin, David; Sepulveda Marquez, Alfonso; Altamirano Sanchez, Efrain; Lazzarino, Frederic; Morin, Pierre; Wang, Shouhua; Hopf, Toby; Kenis, Karine; Lorant, Christophe; Sebaai, Farid; Batuk, Dmitry; Briggs, Basoene; Mertens, Hans; Demuynck, Steven (2020) -
First demonstration of 15nm-WFIN inversion-mode relaxed germanium bulk nFinFET with Si-cap free RMG and NiSiGe source/drain
Mitard, Jerome; Witters, Liesbeth; Arimura, Hiroaki; Sasaki, Yuichiro; Milenin, Alexey; Loo, Roger; Hikavyy, Andriy; Eneman, Geert; Lagrain, Pieter; Mertens, Hans; Sioncke, Sonja; Vrancken, Christa; Bender, Hugo; Barla, Kathy; Horiguchi, Naoto; Mocuta, Anda; Collaert, Nadine; Thean, Aaron (2014) -
Forksheet FETs for Advanced CMOS Scaling: Forksheet-Nanosheet Co-Integration and Dual Work Function Metal Gates at 17nm N-P Space
Mertens, Hans; Ritzenthaler, Romain; Oniki, Yusuke; Briggs, Basoene; Chan, BT; Hikavyy, Andriy; Hopf, Toby; Mannaert, Geert; Tao, Zheng; Sebaai, Farid; Peter, Antony; Vandersmissen, Kevin; Dupuy, Emmanuel; Rosseel, Erik; Batuk, Dmitry; Geypen, Jef; Martinez Alanis, Gerardo Tadeo; Abigail, Daniel_; Grieten, Eva; D'have, Koen; Mitard, Jerome; Subramanian, Sujith; Ragnarsson, Lars-Ake; Weckx, Pieter; Chehab, Bilal; Hellings, Geert; Ryckaert, Julien; Dentoni Litta, Eugenio; Horiguchi, Naoto (2021) -
Forksheet FETs with Bottom Dielectric Isolation, Self-Aligned Gate Cut, and Isolation between Adjacent Source-Drain Structures
Mertens, Hans; Ritzenthaler, Romain; Oniki, Yusuke; Puttarame Gowda, Pallavi; Mannaert, Geert; Sebaai, Farid; Hikavyy, Andriy; Rosseel, Erik; Dupuy, Emmanuel; Peter, Antony; Vandersmissen, Kevin; Radisic, Dunja; Briggs, Basoene; Batuk, Dmitry; Geypen, Jef; Martinez Alanis, Gerardo Tadeo; Seidel, Felix; Richard, Olivier; Chan, BT; Mitard, Jerome; Dentoni Litta, Eugenio; Horiguchi, Naoto (2022) -
Full (Vg,Vd) bias space modeling of hot-carrier degradation in nanowire FETs
Vandemaele, Michiel; Kaczer, Ben; Tyaginov, Stanislav; Stanojevic, Zlatan; Makarov, Alexander; Vaisman Chasin, Adrian; Bury, Erik; Mertens, Hans; Linten, Dimitri; Groeseneken, Guido (2019)