Airgap Integration in MP18 Two-Level Semi-damascene Interconnects with Fully Self-aligned Vias

Abstract

Airgap integration in 18 to 26 nm metal pitch (MP) two-metal level semi-damascene interconnects with fully self-aligned vias (FSAV) on 300 mm wafers is reported. The first metal layer (Mx) is patterned using EUV-SADP with subsequent direct metal etch of the Ru film. Airgap is integrated at a targeted height of 4-6 nm below the top metal lines allowing for FSAV compatibility. 80% of kelvin vias landing on Mx at MP18 meet the < 50 ohm resistance target specification and 40% of them meet the via-to-line leakage target of <100 pA. The airgap line-to-line capacitance is found to be 40% lower compared to the dielectric gap fill reference.