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Browsing by Author "Brunco, David"

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    15nm-WFIN high-performance low-defectivity strained-germanium pFinFETs with low temperature STI-last process

    Mitard, Jerome  
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    Witters, Liesbeth  
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    Loo, Roger  
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    Lee, Seung Hun
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    Sun, J.W.
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    Franco, Jacopo  
    Proceedings paper
    2014, Symposium on VLSI Technology, 9/06/2014, p.138-139
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    Analysis of junction leakage in advanced germanium p+/n junctions

    Eneman, Geert  
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    Sicart i Casain, Oriol
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    Simoen, Eddy  
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    Brunco, David
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    De Jaeger, Brice  
    Proceedings paper
    2007, ESSDERC Proceedings, 11/09/2007, p.454-457
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    Atomic layer deposition as an enabling technology for fabrication of germanium MOS transistor

    Eneman, Geert  
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    Delabie, Annelies  
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    Van Elshocht, Sven  
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    De Jaeger, Brice  
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    Nicholas, Gareth
    Oral presentation
    2007, 7th International Conference Atomic Layer Deposition Conference - ALD
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    Atomic layer deposition of hafnium oxide on Ge and GaAs substrates: precursors and surface preparation

    Delabie, Annelies  
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    Brunco, David
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    Conard, Thierry  
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    Favia, Paola  
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    Bender, Hugo  
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    Franquet, Alexis  
    Journal article
    2008, Journal of the Electrochemical Society, (155) 12, p.H937-H944
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    Atomic layer deposition of high-k dielectric layers on Ge and III-V MOS channels

    Delabie, Annelies  
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    Caymax, Matty  
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    Bellenger, Florence
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    Brammertz, Guy  
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    Conard, Thierry  
    Meeting abstract
    2008, 214th ECS Meeting, 12/10/2008, p.2449
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    Atomic layer deposition of high-k dielectric layers on Ge and III-V MOS channels

    Delabie, Annelies  
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    Alian, AliReza  
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    Bellenger, Florence
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    Brammertz, Guy  
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    Brunco, David
    Proceedings paper
    2008, SiGe, Ge, and Related Compounds 3: Materials, Processing, and Devices, 12/10/2008, p.671-685
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    Band offsets in biaxially stressed SiGe layers for arbitrary orientations

    Eneman, Geert  
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    Roussel, Philippe  
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    Brunco, David
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    Collaert, Nadine  
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    Mocuta, Anda
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    Thean, Aaron  
    Journal article
    2016, Journal of Applied Physics, (120) 5, p.54502
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    Benefits and side effects of high temperature anneal used to reduce threading dislocation defects in epitaxial Ge layers on Si substrates

    Terzieva, Valentina  
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    Souriau, Laurent  
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    Caymax, Matty  
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    Brunco, David
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    Moussa, Alain  
    Oral presentation
    2007, 5th International Conference on Silicon Epitaxy and Heterostructures - ICSI-5
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    Benefits and side effects of high temperature anneal used to reduce threading dislocation defects in epitaxial Ge Layers on Si substrates

    Terzieva, Valentina  
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    Souriau, Laurent  
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    Caymax, Matty  
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    Brunco, David
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    Moussa, Alain  
    Journal article
    2008, Thin Solid Films, (517) 1, p.172-177
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    Defect engineering aspects of advanced Ge process modules

    Claeys, Cor
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    Simoen, Eddy  
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    Opsomer, Karl  
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    Brunco, David
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    Meuris, Marc  
    Journal article
    2008, Materials Science and Engineering B, 154-155, p.49-55
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    Defects and electrical performance of germanium PMOS devices

    Eneman, Geert  
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    Simoen, Eddy  
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    Yang, Rui
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    De Jaeger, Brice  
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    Wang, Gang
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    Mitard, Jerome  
    Meeting abstract
    2009, 215th Electrochemical Society Spring Meeting, 24/05/2009, p.717
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    Defects, junction leakage and electrical performance of Ge pFET devices

    Eneman, Geert  
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    Simoen, Eddy  
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    Yang, Rui
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    De Jaeger, Brice  
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    Wang, Gang
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    Mitard, Jerome  
    Proceedings paper
    2009, Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-band CMOS. 5: New Material, Processing, and Equipment, 24/05/2009, p.195-205
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    Degradation and breakdown of 0.9 nm EOT SiO2/ ALD HfO2/metal gate stacks under positive constant voltage stress

    Degraeve, Robin  
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    Kauerauf, Thomas
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    Cho, Moon Ju
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    Zahid, Mohammed
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    Ragnarsson, Lars-Ake  
    Proceedings paper
    2005-12, Technical Digest International Electronic Devices Meeting (IEDM), 5/12/2005, p.16/06/2001-16/06/2004
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    Device assessment of the electrical activity of threading dislocations in strained Ge epitaxial layers

    Simoen, Eddy  
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    Brouwers, Gijs
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    Eneman, Geert  
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    Bargallo Gonzalez, Mireia
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    De Jaeger, Brice  
    Journal article
    2008, Materials Science in Semiconductor Processing, (11) 5_6, p.364-367
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    Distribution and generation of traps in SiO2/Al2O3 gate stacks

    Crupi, I.
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    Degraeve, Robin  
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    Govoreanu, Bogdan  
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    Brunco, David
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    Roussel, Philippe  
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    Van Houdt, Jan  
    Journal article
    2007, Microelectronics Reliability, (47) 4_5, p.525-527
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    Etch rate study of germanium, GaAs, and InGaAs: a challenge in semiconductor processing.

    Sioncke, Sonja
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    Brunco, David
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    Meuris, Marc  
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    Van Steenbergen, Jan  
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    Vrancken, Evi  
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    Heyns, Marc  
    Meeting abstract
    2008, 9th International Symposium on Ultra Clean Processing of Semiconductor Surfaces - UCPSS, 22/09/2008
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    Etch rates of Ge, GaAs and InGaAs in acids, bases and peroxide based mixtures

    Sioncke, Sonja
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    Brunco, David
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    Meuris, Marc  
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    Uwamahoro, Olivier
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    Van Steenbergen, Jan  
    Proceedings paper
    2008, SiGe, Ge, and Related Compounds 3: Materials, Processing, and Devices, 13/10/2008, p.451-460
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    Etching Ge, GaAs and InGaAs: A challenge in semiconductor processing

    Sioncke, Sonja
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    Brunco, David
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    Meuris, Marc  
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    Van Steenbergen, Jan  
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    Vrancken, Evi  
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    Heyns, Marc  
    Meeting abstract
    2008, 214th ECS Meeting, 12/10/2008, p.2428
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    First demonstration of strained Ge-in-STI IFQW pFETs featuring raised SiGe75% S/D, replacement metal gate and germanided local interconnects

    Mitard, Jerome  
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    Witters, Liesbeth  
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    Vincent, Benjamin  
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    Franco, Jacopo  
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    Favia, Paola  
    Proceedings paper
    2013, VLSI Technology Symposium / VLSI Cricuits Symposium, 10/06/2013, p.T20
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    Flat-band voltage shift of Ruthenium gated stacks and its link with the formation of a thin Ruthenium oxide layer at the Ruthenium/dielectric interface

    Li, Zilan
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    Schram, Tom  
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    Pantisano, Luigi
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    Stesmans, Andre  
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    Conard, Thierry  
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    Shamuilia, Sheron
    Journal article
    2007-02, Journal of Applied Physics, (101) 3, p.34503
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