Browsing by author "Briggs, Basoene"

Now showing items 1-20 of 38

    • A method to pattern tight tip-to-tip in 32nm-pitch N5 interconnect using Ru area selective deposition tone inversion process 

      Briggs, Basoene; Soethoudt, Job; Delabie, Annelies; Wilson, Chris; Tokei, Zsolt; Boemmels, Juergen; Devriendt, Katia; Sebaai, Farid; Lorant, Christophe; Hody, Hubert (2018)

    • Area selective atomic layer deposition: a bottom-up approach for patterning 

      Delabie, Annelies; Soethoudt, Job; Tomczak, Yoann; Briggs, Basoene; Chan, BT; Tokei, Zsolt; Van Elshocht, Sven; Altamirano Sanchez, Efrain; Stevens, Eric; Parsons, Gregory, N (2018)

    • Atomic layer deposition of ruthenium with TiN interface for sub-10nm advanced interconnects beyond copper 

      Wen, Liang Gong; Roussel, Philippe; Varela Pedreira, Olalla; Briggs, Basoene; Groven, Benjamin; Dutta, Shibesh; Popovici, Mihaela Ioana; Heylen, Nancy; Ciofi, Ivan; Vanstreels, Kris; Osterberg, Frederik; Hansen, Ole; Petersen, Dirch H.; Opsomer, Karl; Detavernie, Christophe; Wilson, Chris; Van Elshocht, Sven; Croes, Kristof; Bommels, Jurgen; Tokei, Zsolt; Adelmann, Christoph (2016-09)

    • Buried Power Rail Integration for CMOS Scaling beyond the 3 nm Node 

      Gupta, Anshul; Tao, Zheng; Radisic, Dunja; Mertens, Hans; Varela Pedreira, Olalla; Demuynck, Steven; Boemmels, Juergen; Devriendt, Katia; Heylen, Nancy; Wang, Shouhua; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Peter, Antony; Rassoul, Nouredine; Siew, Yong Kong; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; Capogreco, Elena; Mannaert, Geert; Sepulveda Marquez, Alfonso; Dupuy, Emmanuel; Vandersmissen, Kevin; Chehab, Bilal; Murdoch, Gayle; Altamirano Sanchez, Efrain; Biesemans, Serge; Tokei, Zsolt; Dentoni Litta, Eugenio; Horiguchi, Naoto (2022)

    • Buried power rail integration with FinFETs for ultimate CMOS scaling 

      Gupta, Anshul; Varela Pedreira, Olalla; Arutchelvan, Goutham; Zahedmanesh, Houman; Devriendt, Katia; Hanssen, Frederik; Tao, Zheng; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, Noemie; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min-Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Cousserier, Joris; Yakimets, Dmitry; Lazzarino, Frederic; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Jaysankar, Manoj; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Boemmels, Juergen; Demuynck, Steven; Tokei, Zsolt; Horiguchi, Naoto (2020)

    • Buried Power Rail Integration with Si FinFETs for CMOS Scaling beyond the 5 nm Node 

      Gupta, Anshul; Mertens, Hans; Tao, Zheng; Demuynck, Steven; Boemmels, Juergen; Arutchelvan, Goutham; Devriendt, Katia; Varela Pedreira, Olalla; Ritzenthaler, Romain; Wang, Shouhua; Radisic, Dunja; Kenis, Karine; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; Jourdan, Nicolas; Chan, BT; Zahedmanesh, Houman; Subramanian, Sujith; Schleicher, Filip; Hopf, Toby; Peter, Antony; Rassoul, Nouredine; Debruyn, Haroen; Demonie, Ingrid; Siew, Yong Kong; Chiarella, Thomas; Briggs, Basoene; Zhou, Daisy; Rosseel, Erik; De Keersgieter, An; Capogreco, Elena; Dentoni Litta, Eugenio; Boccardi, Guillaume; Baudot, Sylvain; Mannaert, Geert; Bontemps, N.; Sepulveda Marquez, Alfonso; Mertens, Sofie; Kim, Min Soo; Dupuy, Emmanuel; Vandersmissen, Kevin; Paolillo, Sara; Yakimets, Dmitry; Chehab, Bilal; Favia, Paola; Drijbooms, Chris; Cousserier, Joris; Jaysankar, Manoj; Lazzarino, Frederic; Morin, Pierre; Altamirano Sanchez, Efrain; Mitard, Jerome; Wilson, Chris; Holsteyns, Frank; Tokei, Zsolt; Horiguchi, Naoto (2020)

    • CMOS area scaling and the need for high aspect ratio vias 

      Briggs, Basoene; Guissi, Sofiane; Wilson, Chris; Ryckaert, Julien; Paolillo, Sara; Vandersmissen, Kevin; Versluijs, Janko; Lorant, Christophe; Heylen, Nancy; Boemmels, Juergen; Tokei, Zsolt; Sherazi, Yasser; Weckx, Pieter; Kljucar, Luka; van der Veen, Marleen; Boccardi, Guillaume; De Heyn, Vincent; Gupta, Anshul; Ervin, Joseph; Kamon, Matt (2018)

    • Comparison of Electrical Performance of Co-Integrated Forksheets and Nanosheets Transistors for the 2nm Technological Node and Beyond 

      Ritzenthaler, Romain; Mertens, Hans; Eneman, Geert; Simoen, Eddy; Bury, Erik; Eyben, Pierre; Bufler, Fabian; Oniki, Yusuke; Briggs, Basoene; Chan, BT; Hikavyy, Andriy; Mannaert, Geert; Parvais, Bertrand; Vaisman Chasin, Adrian; Mitard, Jerome; Dentoni Litta, Eugenio; Samavedam, Sri; Horiguchi, Naoto (2021)

    • Cutting-edge epitaxial processes for sub 3 nm technology nodes: application to nanosheet stacks and epitaxial wrap-around contacts 

      Hikavyy, Andriy; Porret, Clément; Mencarelli, M.; Loo, Roger; Favia, Paola; Ayyad, Mustafa; Briggs, Basoene; Langer, Robert; Horiguchi, Naoto (2021)

    • Defect Mitigation in Area-Selective Atomic Layer Deposition of Ruthenium on Titanium Nitride/Dielectric Nanopatterns 

      Soethoudt, Job; Hody, Hubert; Spampinato, Valentina; Franquet, Alexis; Briggs, Basoene; Chan, BT; Delabie, Annelies (2019)

    • Defect mitigation solution for area-selective ALD of Ru on TiN/SiO2 nanopatterns 

      Soethoudt, Job; Grillo, Fabio; Marques, Esteban; Van Ommen, Ruud; Briggs, Basoene; Hody, Hubert; Spampinato, Valentina; Franquet, Alexis; Chan, BT; Delabie, Annelies (2019)

    • Electrical comparison of iN7 EUV hybrid and EUV single patterning BEOL metal layers 

      Lariviere, Stephane; Wilson, Chris; Kutrzeba Kotowska, Bogumila; Versluijs, Janko; Decoster, Stefan; Mao, Ming; van der Veen, Marleen; Jourdan, Nicolas; El-Mekki, Zaid; Heylen, Nancy; Kesters, Els; Verdonck, Patrick; Beral, Christophe; Van Den Heuvel, Dieter; De Bisschop, Peter; Bekaert, Joost; Blanco, Victor; Ciofi, Ivan; Wan, Danny; Briggs, Basoene; Mallik, Arindam; Hendrickx, Eric; Kim, Ryan Ryoung han; McIntyre, Greg; Ronse, Kurt; Boemmels, Juergen; Tokei, Zsolt; Mocuta, Dan (2018)

    • Enabling CD SEM metrology for 5nm technology node and beyond 

      Lorusso, Gian; Ohashi, Takeyoshi; Yamaguchi, Astuko; Inoue, Osamu; Sutani, Takumichi; Horiguchi, Naoto; Boemmels, Juergen; Wilson, Chris; Briggs, Basoene; Tan, Chi Lim; Raymaekers, Tom; Delhougne, Romain; Van den Bosch, Geert; Di Piazza, Luca; Kar, Gouri Sankar; Furnemont, Arnaud; Fantini, Andrea; Donadio, Gabriele Luca; Souriau, Laurent; Crotti, Davide; Yasin, Farrukh; Appeltans, Raf; Rao, Siddharth; De Simone, Danilo; Rincon Delgadillo, Paulina; Leray, Philippe; Charley, Anne-Laure; Zhou, Daisy; Veloso, Anabela; Collaert, Nadine; Hasumi, Kazuhisa; Koshihara, Shunsuke; Ikota, Masami; Okagawa, Yutaka; Ishimoto, Toru (2017)

    • Engineering high quality and conformal ultrathin SiNx films by PEALD for downscaled and advanced CMOS nodes 

      Tomomi, Takayama; Taishi, Ebisudani; Eiichiro, Shiba; Sepulveda Marquez, Alfonso; Blanquart, Timothee; Kimura, Yosuke; Subramanian, Sujith; Baudot, Sylvain; Briggs, Basoene; Gupta, Anshul; Veloso, Anabela; Capogreco, Elena; Mertens, Hans; Meersschaut, Johan; Conard, Thierry; Dara, Praveen; Geypen, Jef; Martinez Alanis, Gerardo Tadeo; Batuk, Dmitry; Demuynck, Steven; Morin, Pierre (2021)

    • Etch challenges in high aspect ratio aupervia patterning 

      Puliyalil, Harinarayanan; Feurprier, Yannick; Briggs, Basoene; Lazzarino, Frederic; Wilson, Chris; Kumar, Kaushik (2019)

    • Fin bending in dimensional scaling 

      Zhang, Liping; Hellin, David; Sepulveda Marquez, Alfonso; Altamirano Sanchez, Efrain; Lazzarino, Frederic; Morin, Pierre; Wang, Shouhua; Hopf, Toby; Kenis, Karine; Lorant, Christophe; Sebaai, Farid; Batuk, Dmitry; Briggs, Basoene; Mertens, Hans; Demuynck, Steven (2020)

    • First Monolithic Integration of 3D Complementary FET (CFET) on 300mm Wafers 

      Subramanian, Sujith; Hosseini, Maryam; Chiarella, Thomas; Sarkar, Satadru; Schuddinck, Pieter; Chan, BT; Radisic, Dunja; Mannaert, Geert; Hikavyy, Andriy; Rosseel, Erik; Sebaai, Farid; Peter, Antony; Hopf, Toby; Morin, Pierre; Wang, Shouhua; Devriendt, Katia; Batuk, Dmitry; Martinez Alanis, Gerardo Tadeo; Veloso, Anabela; Dentoni Litta, Eugenio; Baudot, Sylvain; Siew, Yong Kong; Zhou, X.; Briggs, Basoene; Capogreco, Elena; Hung, Joey; Koret, R.; Spessot, Alessio; Ryckaert, Julien; Demuynck, Steven; Horiguchi, Naoto; Boemmels, Juergen (2020)

    • Forksheet FETs for Advanced CMOS Scaling: Forksheet-Nanosheet Co-Integration and Dual Work Function Metal Gates at 17nm N-P Space 

      Mertens, Hans; Ritzenthaler, Romain; Oniki, Yusuke; Briggs, Basoene; Chan, BT; Hikavyy, Andriy; Hopf, Toby; Mannaert, Geert; Tao, Zheng; Sebaai, Farid; Peter, Antony; Vandersmissen, Kevin; Dupuy, Emmanuel; Rosseel, Erik; Batuk, Dmitry; Geypen, Jef; Martinez Alanis, Gerardo Tadeo; Abigail, Daniel_; Grieten, Eva; D'have, Koen; Mitard, Jerome; Subramanian, Sujith; Ragnarsson, Lars-Ake; Weckx, Pieter; Chehab, Bilal; Hellings, Geert; Ryckaert, Julien; Dentoni Litta, Eugenio; Horiguchi, Naoto (2021)

    • Forksheet FETs with Bottom Dielectric Isolation, Self-Aligned Gate Cut, and Isolation between Adjacent Source-Drain Structures 

      Mertens, Hans; Ritzenthaler, Romain; Oniki, Yusuke; Puttarame Gowda, Pallavi; Mannaert, Geert; Sebaai, Farid; Hikavyy, Andriy; Rosseel, Erik; Dupuy, Emmanuel; Peter, Antony; Vandersmissen, Kevin; Radisic, Dunja; Briggs, Basoene; Batuk, Dmitry; Geypen, Jef; Martinez Alanis, Gerardo Tadeo; Seidel, Felix; Richard, Olivier; Chan, BT; Mitard, Jerome; Dentoni Litta, Eugenio; Horiguchi, Naoto (2022)

    • High Aspect Ratio Supervia Dual Damascene etch for iN5 and beyond 

      Puliyalil, Harinarayanan; Feurprier, Yannick; Oikawa, Noriaki; Vega Gonzalez, Victor; Briggs, Basoene; Montero Alvarez, Daniel; Lazzarino, Frederic; Tokei, Zsolt; Satoru, Nakamura; Tahara, Shigeru; Kumar, Kaushik (2021)