Browsing by Author "Ferain, Isabelle"

Advanced electrical characterization toward (sub) 1nm EOT HfSiON – hole trapping in PFET and L-dependent effects

Capping-metal gate integration technology for multiple-VT CMOS in MuGFETs

Charge pumping spectroscopy: HfSiON defect study after substrate hot electron injection

Dominant layer for stress-induced positive charges in Hf-based gate stacks

Fabrication and characterization of SOI multi gate field effect transistors with high-k dielectrics and metal gates

Flexible and robust capping-metal gate integration technology enabling multiple-VT CMOS in MuGFETs

Fundamentals and extraction of velocity saturation in sub-100nm (110)-Si and (100)-Ge

GIDL (gate-induced drain leakage) and parasitic Schottky barrier leakage elimination in aggressively scaled HfO2/TiN FiNFET devices

Impact of galvanic corrosion on metal gate stacks

Integration challenges for multi-gate devices

Interface formation in rare-earth oxide containing advanced gate stacks

Interface stability in advanced high-k-metal-gate stacks

Line width dependent mobility in high-k – a comparative performance study between FUSI and TiN

Low-voltage 6T FinFET SRAM cell with high SNM using HfSiON/TiN gate stack, fin widths down to 10nm and 30nm gate length

Low-voltage scaled 6T FinFET SRAM cells

Metal gate technology using a Dy2O3 dielectric cap approach for multiple-VT in NMOS FinFETs

Metal gate thickness optimization for MuGFET performance improvement

Methodology for flatband voltage measurement in fully depleted floating-body FinFETs

Minimization of the MuGFET contact resistance by integration of NiSi contacts on epitaxially raised source/drain regions

Mobility and dielectric quality of 1-nm EOT HfSiON on Si(110) and (100)