Browsing by Author "Hoffmann, Thomas"
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Publication 3D-carrier profiling in FinFETs using scanning spreading resistance microscopy
Proceedings paper2011, IEEE International Electron Devices Meeting - IEDM, 5/12/2011, p.119-122Publication Achieving 9ps unloaded ring oscillator delay in FuSI/HfSiON with 0.8 nm EOT
Proceedings paper2007, Symposium on VLSI Technology. Digest of Technical Papers, 14/06/2007, p.198-199Publication Achieving low VT Ni-FUSI CMOS via lanthanide incorporation in the gate stack
Proceedings paper2007-09, Proceedings of the 37th European Solid-State Device Research Conference - ESSDERC, 11/09/2007Publication Achieving low-VT Ni-FUSI CMOS via Lanthanide incorporation in the gate stack
Journal article2008, Solid-State Electronics, (52) 9, p.1303-1311Publication Addressing key concerns for implementation of Ni FUSI into manufacturing for 45/32 nm CMOS
Proceedings paper2007, Symposium on VLSI. Technology Digest of Technical Papers, 14/06/2007, p.158-159Publication Advanced CMOS device technologies for 45nm node and below
Journal article2007, Science and Technology of Advanced Materials, (8) 3, p.214-218Publication Advanced FinFET devices for sub-32nm technology nodes: characteristics and integration challenges
Meeting abstract2009, 215th Electrochemical Society Spring Meeting, 25/05/2009, p.935Publication Assessment of OPC effectiveness using two-dimensional metrics
Proceedings paper2002, Optical Microlithography XV, 5/03/2002, p.395-406Publication Basic aspects of the formation and activation of boron junctions using plasma immersion ion implantation
Proceedings paper2008, 17th International Conference in Ion Implantation Technology - IIT, 8/06/2008, p.464-464Publication Conformal doping of FINFET's: a fabrication and metrology challenge
Proceedings paper2008, 17th International Conference in Ion Implantation Technology - IIT, 8/06/2008, p.449-456Publication Demonstration of phase-controlled Ni-FUSI CMOSFETs employing SiON dielectrics capped with sub-monolayer ALD HfSiON for low power applications
;Yu, HongYu ;Chang, Shou-Zen; ; ; Everaert, Jean-LucProceedings paper2007-09, Proceedings of the 37th European Solid-State Device Research Conference - ESSDERC, 10/09/2007, p.203-206Publication Electrical demonstration of thermally stable Ni silicides on Si1-xCx epitaxial layers
Journal article2010, Microelectronic Engineering, (87) 3, p.306-310Publication Hydrothermal growth of BaTiO3 on TiO2 single crystals
;Lisoni, Judit ;Lei, C.H. ;Hoffmann, ThomasFuenzalida, V.M.Journal article2002, Surface Science, (515) 2_3, p.431-440Publication Influence of the microstructure on the oxidation of Ni thin films
Journal article2012, Corrosion Science, 59, p.282-289Publication Interim investigation of CD-SEM resist shrinkage in 193nm lithography
Oral presentation2002, 3rd European Advanced Equipment Control / Advanced Process Control ConferencePublication Low Vt Ni-FUSI CMOS technology using a DyO cap layer with either single or dual Ni-phases
Proceedings paper2007, Symposium on VLSI Technology. Digest of Technical Papers, 14/06/2007, p.18-19Publication On the efficiency of stress techniques in gate-last n-type bulk FinFETs
Journal article2012, Solid-State Electronics, 74, p.19-24Publication OPC aware mask and wafer metrology
Proceedings paper2002, 18th European Conference on Mask Technology for Integrated Circuits and Microcomponents, 14/01/2002, p.175-181Publication Parasitic source/drain resistance reduction in N-channel SOI MuGFETs with 15nm wide fins
Proceedings paper2005-10, Proceedings of the IEEE International SOI Conference, 3/10/2005, p.226-228Publication Performance and leakage optimization in carbon and fluorine C0-implanted pMOSFETs
Proceedings paper2008, International Symposium on VLSI Technology, Systems and Applications - VLSI-TSA, 21/04/2008, p.30-31