Browsing by Author "Surdeanu, Radu"

A comparison of spike, flash, SPER and laser annealing for 45nm CMOS

A practical baseline process for advanced CMOS devices research

Advanced PMOS device architecture for highly-doped ultra-shallow junctions

Channel engineering and junction overlap issues for ultra-shallow junctions formed by SPER in the 45 nm CMOS technology node

Chemical and electrical dopant evolution during solid phase epitaxial regrowth

Chemical and electrical dopants profile evolution during solid phase epitaxial regrowth

CMOS device optimisation for mixed-signal technologies

CMOS scaling beyond the 90 nm CMOS technology node: shallow junction and integration challenges

Demonstration of asymmetric gate-oxide thickness four-terminal FinFETs having flexible threshold voltage and good subthreshold slope

Evidence on the mechanism of boron deactivation in Ge-preamorphized ultrashallow junctions

Experimental investigation of optimum gate workfunction for CMOS four-terminal muligate MOSFETs (MUGFETs)

Four-terminal FinFET device technology

Independent double-gate FinFets with asymmetric gate stacks

Integrating diffusionless anneals into advanced CMOS technologies

Integration challenges of SPER junctions for the 45 nm technology node

Integration of low and high temperature junction anneals for 45nm CMOS

Laser annealing for ultra-shallow junction formation in advanced CMOS

Leakage optimatisation of ultra-shallow junctions formed by solid phase epitaxial regrowth (SPER)

Leakage optimization of ultra-shallow junctions formed by solid phase epitaxial regrowth

Minimization of the MuGFET contact resistance by integration of NiSi contacts on epitaxially raised source/drain regions