Browsing by Author "Vaes, Jan"
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Publication 3D stacked IC demonstration using a through silicon via first approach
Proceedings paper2008, Technical Digest International Electron Devices Meeting - IEDM, 15/12/2008, p.603-606Publication Advanced production challenges for automated ultra-thin wafer handling
Proceedings paper2012, 27th European Photovoltaic Solar Energy Conference - EUPVSEC, 24/09/2012, p.1165-1170Publication CMOS-integrated poly-SiGe cantilevers with read/write system for probe storage device
; Publication CMP of a RU based layer in an advanced Cu low-k stack
Proceedings paper2007-10, International Conference on Planarization CMP Technology - ICPT, 25/10/2007, p.43-48Publication CMP processing to enable 3D stacked IC integration
Proceedings paper2009, International Conference on Planarization/CMP Technology - ICPT, 19/11/2009Publication Copper plating for 3d interconnects
Proceedings paper2010, Processing, Materials, and Integration of Damascene and 3D Interconnects, 4/10/2009, p.119-125Publication Copper plating for 3D interconnects
Meeting abstract2009, 216th ECS Meeting, 4/10/2009, p.2779Publication Crack initiation for kerf-loss-free wafering
Publication Crystalline thin-foil silicon solar cells: where crystalline quality meets thin-film processing
Journal article2012, Progress in Photovoltaics Research and Applications, (20) 6, p.770-784Publication Elucidating advanced inhibitor material in copper CMP: K-sorbate as a passivator
Publication Elucidating advanced inhibitor material in Copper CMP: K-sorbate as an inhibitor in Copper CMP slurry
Publication Epoxy-induced spalling of silicon
Proceedings paper2012, 2nd International Conference on Crystalline Silicon Photovoltaics - SiliconPV, 3/04/2012, p.567-572Publication Evidence and characterization of crystallographic defect and material quality after SLIM-cut process
Proceedings paper2011, Advanced Materials Processing for Scalable Solar-Cell Manufacturing, 25/04/2011, p.1323-c04-05Publication Grinding and mixed silicon copper CMP of stacked patterned wafers for 3D integration
Proceedings paper2007, Enabling Technologies for 3-D Integration, 26/11/2006, p.275-280Publication Highly reliable CMOS-integrated 11MPixel SiGe-based micro-mirror arrays for high-end industrial applications
Proceedings paper2008, Technical Digest International Electron Devices Meeting - IEDM, 15/12/2008, p.655-658Publication Implementation of Ru based barriers in 50 nm half pitch single damascene Cu/SiCOH (k=2.5) structures
; ; ; ; Meeting abstract2008, Advanced Metallization Conference - AMC, 23/09/2008Publication Integration challenges of copper Through Silicon Via (TSV) metallization for 3D-Stacked IC integration
Meeting abstract2010, Materials for Advanced Metallization - MAM, 7/03/2010Publication K-sorbate as a passivator in copper chemical mechanical planarization (CMP) slurries
Publication Novel patterning shrink technique enabling sub-50nm trench and contact integration
Proceedings paper2007, International Symposium on Semiconductor Manufacturing, 15/10/2007Publication Potassium sorbate as an inhibitor in copper chemical mechanical planarization slurries. Part II: Effects of sorbate on chemical mechanical planarization performance