Browsing by Author "Vervoort, Iwan"
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Publication A grain size limitation inherent to electroplated copper films
Proceedings paper2000, Proceedings of the IEEE International Interconnect Technology Conference - IITC, 5/06/2000, p.31-33Publication Advanced solutions for copper and low k technology
Oral presentation2000, Semicon Europe; 2000; München, Germany.Publication Characterisation and integration feasibility of JSR's low-k dielectric LKD-5109
Journal article2002, Microelectronic Engineering, (64) 1_4, p.25-33Publication Copper deposition and subsequent grain structure evolution in narrow lines
; ; ; ; Publication Copper seed layer scaling for advanced interconnects: extendibility of I-PVD
Proceedings paper2003, Proceedings of the Advanced Metallization Conference 2002, 1/10/2002, p.403-407Publication Critical issues in the integration of Copper and low-k dielectrics
Proceedings paper1999, Proceedings of the International Interconnect Technology Conference - IITC; San Francisco, CA, USA., p.262-264Publication Cu/LKD-5109 damascene integration demonstration using FF-02 low-k spin-on hard-mask and embedded etch-stop
Proceedings paper2002, Proceedings of the IEEE International Interconnect Technology Conference, 3/06/2002, p.51-53Publication Electrical and microstructural characterization of narrow Cu interconnects
Oral presentation2003, Advanced Metallization ConferencePublication Electrical and microstructural characterization of narrow Cu interconnects
Proceedings paper2004, Advanced Metallization Conference 2003, 21/10/2003, p.225-229Publication Electrochemical deposition of copper alloys
Oral presentation2001, Advanced Metallization Conference; 9-11 October 2001; Montreal, Canada.Publication Etch process development for FLARE(tm) for dual damascene architecture using a N2/O2 plasma
Proceedings paper1999, Proceedings of the International Interconnect Technology Conference - IITC; San Francisco, CA, USA., p.59-61Publication Grain growth in electroplated copper
Oral presentation2001, MRS Spring Meeting. Symposium L: Materials, Technology, and Reliability for Advanced Interconnects and Low-k Dielectrics; AprilPublication Grain growth, stress, and impurities in electroplated copper
Journal article2002, Journal of Materials Research, (17) 3, p.582-589Publication Grain structure evolution during annealing of electroplated copper
Proceedings paper2002, Stress-Induced Phenomena in Metallization: 6th International Workshop, 25/07/2001, p.229-234Publication High Q inductor add-on module in thick Cu/SiLK/sup TM/ single damascene
Proceedings paper2001, Proceedings of the IEEE International Interconnect Technology Conference, 4/06/2001, p.107-109Publication Integration feasibility of porous SiLK semiconductor dielectric
; ; Publication Integration of a low permittivity spin-on embedded hardmask for Cu/SiLK resin dual damascene
Publication Integration of Cu and low-K dielectrics: effect of hard mask and dry etch on electrical performance of damascene structures
Journal article2001, Microelectronic Engineering, (55) 1_4, p.277-283Publication Integration of electroless and electrolytic Cu and IC back end of line technologies
Proceedings paper2000, Electrochemical Technology Applications in Electronics III, 17/10/1999, p.71-79Publication Integration of electroless and electrolytic Cu in the IC back end line of technologies
Meeting abstract1999, 196th Meeting of the Electrochemical Society: 3rd Int. Symposium on Electrochemical Technology Applications in Electronics, 17/10/1999, p.903