Browsing by Author "Lee, Jae Woo"

1/f noise analysis of replacement metal gate bulk p-type fin field effect transistor

Assessment of the impact of inelastic tunneling on the frequency-depth conversion from low-frequency noise spectra

Automatic Prediction of Metal-Oxide-Semiconductor Field-Effect Transistor Threshold Voltage Using Machine Learning Algorithm

Automatic prediction of MOSFETs threshold voltage by machine learning algorithms

Bulk FinFET Fin height control using Gas Cluster Ion Beam (GCIB) - Location Specific Processing (LSP)

Comparison of temperature dependent carrier transport in FinFET and gate-all-Around nanowire FET

Deep Understanding of Electron Beam Effects on 2D Layered Semiconducting Devices Under Bias Applications

Defect spectroscopy of sidewall interfaces in gate-all-around silicon nanosheet FET

Heated implantation with amorphous carbon CMOS mask for scaled FinFETs

Heated implantation with amorphous carbon CMOS mask for scaled FinFETs

Impact of multi-gate device architectures on digital and analog circuits and its implications on system-on-chip technologies

Improved channel hot carrier reliability in p-FinFETs with replacement metal gate by a nitrogen post deposition anneal process

Improved sidewall doping with small implant angle by AsH3 Ion assisted deposition and doping process for scaled NMOS Si bulk FinFETs

Low frequency noise analysis for post-treatment of replacement metal gate FinFET

Low frequency noise performance of gate-first and replacement metal gate CMOS technologies

Low-frequency-noise-based oxide trap profiling in replacement high-k/metal gate pMOSFETs

Low-frequency-noise-based oxide trap profiling in replacement high-k/metal-gate pMOSFETs

Mobility analysis of surface roughness scattering in FinFET devices

Modeling and Understanding the Compact Performance of h-BN Dual-Gated ReS2 Transistor

Performance and reliability of high-mobility Si0.55Ge0.45 p-channel FinFETs based on epitaxial cladding of Si fins