Browsing by author "Margetis, Joe"
Now showing items 1-20 of 21
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Benchmarking Ge1-xSnx CVD Epitaxy using GeH4 and Ge2H6
Vohra, Anurag; Loo, Roger; Kohen, David; Margetis, Joe; Tolle, John; Stange, Daniela; Buca, Dan; Vandervorst, Wilfried (2016-11) -
Enhanced B doping in CVD-grown GeSn:B using B $d-doping layers
Kohen, David; Vohra, Anurag; Loo, Roger; Vandervorst, Wilfried; Bhargava, Nupur; Margetis, Joe; Tolle, John (2018-02) -
Epitaxial GeSn: Impact of process conditions on material quality
Loo, Roger; Shimura, Yosuke; Ike, Shinichi; Vohra, Anurag; Stoica, Toma; Stange, Daniela; Buca, Dan; Kohen, David; Margetis, Joe; Tolle, John (2018) -
Epitaxial GeSn: impact of process conditions on material quality
Loo, Roger; Shimura, Yosuke; Ike, Shinichi; Vohra, Anurag; Stoica, Toma; Buca, Dan; Kohen, David; Margetis, Joe; Tolle, John (2018-05) -
Epitaxial GeSn: Impact of process conditions on material quality
Loo, Roger; Shimura, Yosuke; Ike, Shinichi; Vohra, Anurag; Stoica, Toma; Stange, Daniela; Buca, Dan; Kohen, David; Margetis, Joe; Tolle, John (2018) -
Epitaxial growth of Ga doped SiGe for reduction of contact resistance in finFET source/drain materials
Margetis, Joe; Kohen, David; Porret, Clément; Petersen Barbosa Lima, Lucas; Khazaka, Rami; Loo, Roger; Tolle, John (2019) -
Epitaxial growth of Ga-doped SiGe for reduction of contact resistance in finFET source/drain materials
Margetis, Joe; Kohen, David; Porret, Clément; Petersen Barbosa Lima, Lucas; Khazaka, Rami; Rengo, Gianluca; Loo, Roger; Tolle, John; Demos, Alex (2019-10) -
Epitaxial growth schemes for fin and Gate All Around devices
Loo, Roger; Hikavyy, Andriy; Rosseel, Erik; Porret, Clément; Vohra, Anurag; Kohen, David; Margetis, Joe; Tolle, John; Langer, Robert (2018) -
Epitaxial growth schemes for Fin and Gate-All-Around devices
Loo, Roger; Hikavyy, Andriy; Rosseel, Erik; Porret, Clément; Vohra, Anurag; Kohen, David; Margetis, Joe; Tolle, John; Langer, Robert (2018-05) -
Fundamentals of Ge1-xSnx and SiyGe1-x-ySnx RPCVD epitaxy
Margetis, Joe; Mosleh, Aboozar; Ghetmiri, Seyed Amir; Al-Kabi, Sattar; Dou, Wei; Du, Wei; Bhargava, Nupur; Yu, Shui-Qing; Profijt, Harald; Kohen, David; Loo, Roger; Vohra, Anurag; Tolle, John (2017) -
Ga-doped Ge and [B + Ga] Co-doped SiGe epitaxial source-drain for Sub-7 nm logic devices
Porret, Clément; Margetis, Joe; Tolle, John; Sammak, Amir; Scappucci, Giordano; Petersen Barbosa Lima, Lucas; Kohen, David; Kunert, Bernardette; Hikavyy, Andriy; Loo, Roger (2018) -
Gallium-doped SiGe and Ge via MO-RPCVD epitaxy
Margetis, Joe; Porret, Clément; Kumar, Raj; Petersen Barbosa Lima, Lucas; Kohen, David; Loo, Roger; Tolle, John (2018-05) -
Ge1-xSnx and SiyGe1-x-ySnx epitaxy on a commercial CVD reactor
Margetis, Joe; Mosleh, Aboozar; Ghetmiri, Seyed Amir; Bhargava, Nupur; Yu, Shui-Qing; Profijt, Harald; Kohen, David; Loo, Roger; Vohra, Anurag; Tolle, John (2016-05) -
Improving the electrical properties of epitaxial SiGe:B with excimer laser annealing treatments
Huang, Yan-Hua; Porret, Clément; Hikavyy, Andriy; Rengo, Gianluca; Petersen Barbosa Lima, Lucas; Khazaka, Rami; Kohen, David; Margetis, Joe; Tolle, John; Mazzamuto, Fulvio; Tabata, Toshiyuki; Heyns, Marc; Loo, Roger (2019) -
Investigation of low temperature SiP epitaxy on 300 mm Si substrates
Khazaka, Rami; Lima, Lucas; Rosseel, Erik; Hikavyy, Andriy; D'Costa, Vijay; Margetis, Joe; Tolle, John; Xie, Qi (2020) -
Selective epitaxial growth of high-P Si:P for dource/drain formation in advanced Si nFETs
Rosseel, Erik; dhayalan,; Hikavyy, Andriy; Loo, Roger; Profijt, Harald; Kohen, David; Kubicek, Stefan; Chiarella, Thomas; Yu, Hao; Horiguchi, Naoto; Mocuta, Dan; Barla, Kathy; Thean, Aaron; Bartlett, Gregory; Margetis, Joe; Bhargava, Nupur; Tolle, John (2016) -
Selective epitaxial growth of high-P Si:P for dource/drain formation in advanced Si nFETs
Rosseel, Erik; Dhayalan, Sathish Kumar; Hikavyy, Andriy; Loo, Roger; Profijt, Harald; Kohen, David; Kubicek, Stefan; Chiarella, Thomas; Yu, Hao; Horiguchi, Naoto; Mocuta, Dan; Barla, Kathy; Thean, Aaron; Bartlett, Greg; Margetis, Joe; Bhargava, Naipur; Tolle, John (2016) -
Very low temperature epitaxy of group-IV semiconductors for use in finFET, stacked nanowires and monolithic 3D integration
Porret, Clément; Hikavyy, Andriy; Gomez Granados, Juan Fernando; Baudot, Sylvain; Vohra, Anurag; Kunert, Bernardette; Douhard, Bastien; Bogdanowicz, Janusz; Schaekers, Marc; Kohen, David; Margetis, Joe; Tolle, John; Petersen Lima, Lucas; Sammak, Amir; Scappucci, Giordano; Rosseel, Erik; Langer, Robert; Loo, Roger (2018) -
Very low temperature epitaxy of group-IV semiconductors for use in FinFET, stacked nanowires and monolithic 3D integration
Porret, Clément; Hikavyy, Andriy; Gomez Granados, Juan Fernando; Baudot, Sylvain; Vohra, Anurag; Kunert, Bernardette; Douhard, Bastien; Bogdanowicz, Janusz; Schaekers, Marc; Kohen, David; Margetis, Joe; Tolle, John; Petersen Barbosa Lima, Lucas; Sammak, Amir; Scappucci, Giordano; Rosseel, Erik; Langer, Robert; Loo, Roger (2018) -
Very low temperature epitaxy of group-IV semiconductors for use in FinFET, stacked nanowires and monolithic 3D integration
Porret, Clément; Vohra, Anurag; Hikavyy, Andriy; Rosseel, Erik; Huang, Yan-Hua; Tirrito, Matteo; Kohen, David; Margetis, Joe; Tolle, John; Petersen Barbosa Lima, Lucas; Khazaka, Rami; Langer, Robert; Loo, Roger (2019)